xref: /rk3399_rockchip-uboot/include/configs/omap3_overo.h (revision dbba3daf9e4aac9cc9c8fcfdc886393c940fe764)
1 /*
2  * Configuration settings for the Gumstix Overo board.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9 
10 /*
11  * High Level Configuration Options
12  */
13 #define CONFIG_OMAP				/* in a TI OMAP core */
14 #define CONFIG_OMAP34XX				/* which is a 34XX */
15 #define CONFIG_OMAP3_OVERO			/* working with overo */
16 #define CONFIG_OMAP_GPIO
17 #define CONFIG_OMAP_COMMON
18 
19 #define CONFIG_SDRC				/* The chip has SDRC controller */
20 
21 #include <asm/arch/cpu.h>			/* get chip and board defs */
22 #include <asm/arch/omap3.h>
23 
24 /*
25  * Display CPU and Board information
26  */
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
29 
30 /* Clock Defines */
31 #define V_OSCK			26000000	/* Clock output from T2 */
32 #define V_SCLK			(V_OSCK >> 1)
33 
34 #define CONFIG_MISC_INIT_R
35 
36 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
37 #define CONFIG_SETUP_MEMORY_TAGS
38 #define CONFIG_INITRD_TAG
39 #define CONFIG_REVISION_TAG
40 
41 #define CONFIG_OF_LIBFDT
42 
43 /*
44  * Size of malloc() pool
45  */
46 #define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB sector */
47 
48 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
49  * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
50 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 15))
51 
52 /*
53  * Hardware drivers
54  */
55 
56 /*
57  * NS16550 Configuration
58  */
59 #define V_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
60 
61 #define CONFIG_SYS_NS16550
62 #define CONFIG_SYS_NS16550_SERIAL
63 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
64 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
65 
66 /*
67  * select serial console configuration
68  */
69 #define CONFIG_CONS_INDEX		3
70 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
71 #define CONFIG_SERIAL3			3
72 
73 /* allow to overwrite serial and ethaddr */
74 #define CONFIG_ENV_OVERWRITE
75 #define CONFIG_BAUDRATE			115200
76 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \
77 					115200}
78 #define CONFIG_GENERIC_MMC
79 #define CONFIG_MMC
80 #define CONFIG_OMAP_HSMMC
81 #define CONFIG_DOS_PARTITION
82 
83 /* commands to include */
84 #include <config_cmd_default.h>
85 
86 #define CONFIG_CMD_CACHE
87 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
88 #define CONFIG_CMD_FAT		/* FAT support			*/
89 #define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
90 
91 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
92 #define CONFIG_CMD_MMC		/* MMC support			*/
93 #define CONFIG_CMD_NAND		/* NAND support			*/
94 
95 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
96 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
97 #undef CONFIG_CMD_IMI		/* iminfo			*/
98 #undef CONFIG_CMD_IMLS		/* List all found images	*/
99 #undef CONFIG_CMD_NFS		/* NFS support			*/
100 #define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
101 
102 #ifdef CONFIG_CMD_NAND
103 
104 #define CONFIG_CMD_MTDPARTS	/* MTD partition support */
105 #define CONFIG_CMD_UBI		/* UBI-formated MTD partition support */
106 #define CONFIG_CMD_UBIFS	/* Read-only UBI volume operations */
107 
108 #define CONFIG_RBTREE		/* required by CONFIG_CMD_UBI */
109 #define CONFIG_LZO		/* required by CONFIG_CMD_UBIFS */
110 
111 #define CONFIG_MTD_DEVICE	/* required by CONFIG_CMD_MTDPARTS   */
112 #define CONFIG_MTD_PARTITIONS	/* required for UBI partition support */
113 
114 /* NAND block size is 128 KiB.  Synchronize these values with
115  * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
116  *  xloader              4 * NAND_BLOCK_SIZE = 512 KiB
117  *  uboot               14 * NAND_BLOCK_SIZE = 1792 KiB
118  *  uboot environtment   2 * NAND_BLOCK_SIZE = 256 KiB
119  *  linux               32 * NAND_BLOCK_SIE = 4 MiB
120  *  rootfs              remainder
121  */
122 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
123 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"	\
124 	"512k(xloader),"				\
125 	"1792k(u-boot),"				\
126 	"256k(environ),"				\
127 	"4m(linux),"					\
128 	"-(rootfs)"
129 #else /* CONFIG_CMD_NAND */
130 #define MTDPARTS_DEFAULT
131 #endif /* CONFIG_CMD_NAND */
132 
133 #define CONFIG_SYS_NO_FLASH
134 #define CONFIG_SYS_I2C
135 #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
136 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
137 #define CONFIG_SYS_I2C_OMAP34XX
138 
139 /*
140  * TWL4030
141  */
142 #define CONFIG_TWL4030_POWER
143 #define CONFIG_TWL4030_LED
144 
145 /*
146  * Board NAND Info.
147  */
148 #define CONFIG_SYS_NAND_QUIET_TEST
149 #define CONFIG_NAND_OMAP_GPMC
150 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
151 							/* to access nand */
152 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
153 							/* to access nand */
154 							/* at CS0 */
155 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND */
156 						/* devices */
157 #define CONFIG_JFFS2_NAND
158 /* nand device jffs2 lives on */
159 #define CONFIG_JFFS2_DEV		"nand0"
160 /* start of jffs2 partition */
161 #define CONFIG_JFFS2_PART_OFFSET	0x680000
162 #define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
163 							/* partition */
164 
165 /* Environment information */
166 #define CONFIG_BOOTDELAY		5
167 
168 #define CONFIG_EXTRA_ENV_SETTINGS \
169 	"loadaddr=0x82000000\0" \
170 	"console=ttyO2,115200n8\0" \
171 	"mpurate=500\0" \
172 	"optargs=\0" \
173 	"vram=12M\0" \
174 	"dvimode=1024x768MR-16@60\0" \
175 	"defaultdisplay=dvi\0" \
176 	"mmcdev=0\0" \
177 	"mmcroot=/dev/mmcblk0p2 rw\0" \
178 	"mmcrootfstype=ext3 rootwait\0" \
179 	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
180 	"nandrootfstype=ubifs\0" \
181 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
182 	"mmcargs=setenv bootargs console=${console} " \
183 		"${optargs} " \
184 		"mpurate=${mpurate} " \
185 		"vram=${vram} " \
186 		"omapfb.mode=dvi:${dvimode} " \
187 		"omapdss.def_disp=${defaultdisplay} " \
188 		"root=${mmcroot} " \
189 		"rootfstype=${mmcrootfstype}\0" \
190 	"nandargs=setenv bootargs console=${console} " \
191 		"${optargs} " \
192 		"mpurate=${mpurate} " \
193 		"vram=${vram} " \
194 		"omapfb.mode=dvi:${dvimode} " \
195 		"omapdss.def_disp=${defaultdisplay} " \
196 		"root=${nandroot} " \
197 		"rootfstype=${nandrootfstype}\0" \
198 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
199 	"bootscript=echo Running bootscript from mmc ...; " \
200 		"source ${loadaddr}\0" \
201 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
202 	"importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
203 		"env import -t ${loadaddr} ${filesize}\0" \
204 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
205 	"mmcboot=echo Booting from mmc ...; " \
206 		"run mmcargs; " \
207 		"bootm ${loadaddr}\0" \
208 	"nandboot=echo Booting from nand ...; " \
209 		"run nandargs; " \
210 		"nand read ${loadaddr} 280000 400000; " \
211 		"bootm ${loadaddr}\0" \
212 
213 #define CONFIG_BOOTCOMMAND \
214 	"mmc dev ${mmcdev}; if mmc rescan; then " \
215 		"if run loadbootscript; then " \
216 			"run bootscript; " \
217 		"else " \
218 			"if run loadbootenv; then " \
219 				"run importbootenv; " \
220 				"if test -n ${uenvcmd}; then " \
221 					"echo Running uenvcmd ...;" \
222 					"run uenvcmd;" \
223 				"fi;" \
224 			"fi;" \
225 			"if run loaduimage; then " \
226 				"run mmcboot; " \
227 			"else run nandboot; " \
228 			"fi; " \
229 		"fi; " \
230 	"else run nandboot; fi"
231 
232 #define CONFIG_AUTO_COMPLETE	1
233 /*
234  * Miscellaneous configurable options
235  */
236 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
237 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
238 #define CONFIG_SYS_PROMPT		"Overo # "
239 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
240 /* Print Buffer Size */
241 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
242 					sizeof(CONFIG_SYS_PROMPT) + 16)
243 #define CONFIG_SYS_MAXARGS		16	/* max number of command */
244 						/* args */
245 /* Boot Argument Buffer Size */
246 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
247 /* memtest works on */
248 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
249 #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
250 					0x01F00000) /* 31MB */
251 
252 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
253 								/* address */
254 /*
255  * OMAP3 has 12 GP timers, they can be driven by the system clock
256  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
257  * This rate is divided by a local divisor.
258  */
259 #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
260 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
261 
262 /*-----------------------------------------------------------------------
263  * Physical Memory Map
264  */
265 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
266 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
267 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
268 
269 /*-----------------------------------------------------------------------
270  * FLASH and environment organization
271  */
272 
273 /* **** PISMO SUPPORT *** */
274 
275 /* Configure the PISMO */
276 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
277 #define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
278 
279 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
280 
281 #if defined(CONFIG_CMD_NAND)
282 #define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
283 #endif
284 
285 /* Monitor at start of flash */
286 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
287 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
288 
289 #define CONFIG_ENV_IS_IN_NAND
290 #define ONENAND_ENV_OFFSET		0x240000 /* environment starts here */
291 #define SMNAND_ENV_OFFSET		0x240000 /* environment starts here */
292 
293 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
294 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
295 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
296 
297 #if defined(CONFIG_CMD_NET)
298 /*----------------------------------------------------------------------------
299  * SMSC9211 Ethernet from SMSC9118 family
300  *----------------------------------------------------------------------------
301  */
302 
303 #define CONFIG_SMC911X
304 #define CONFIG_SMC911X_32_BIT
305 #define CONFIG_SMC911X_BASE		0x2C000000
306 
307 #endif /* (CONFIG_CMD_NET) */
308 
309 /*
310  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
311  * and older u-boot.bin with the new U-Boot SPL.
312  */
313 #define CONFIG_SYS_TEXT_BASE		0x80008000
314 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
315 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
316 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
317 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
318 					 CONFIG_SYS_INIT_RAM_SIZE - \
319 					 GENERATED_GBL_DATA_SIZE)
320 
321 #define CONFIG_SYS_CACHELINE_SIZE	64
322 
323 /* Defines for SPL */
324 #define CONFIG_SPL
325 #define CONFIG_SPL_FRAMEWORK
326 #define CONFIG_SPL_NAND_SIMPLE
327 #define CONFIG_SPL_TEXT_BASE		0x40200800
328 #define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
329 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
330 
331 /* move malloc and bss high to prevent clashing with the main image */
332 #define CONFIG_SYS_SPL_MALLOC_START	0x87000000
333 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
334 #define CONFIG_SPL_BSS_START_ADDR	0x87080000	/* end of minimum RAM */
335 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
336 
337 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
338 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
339 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
340 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
341 
342 #define CONFIG_SPL_BOARD_INIT
343 #define CONFIG_SPL_LIBCOMMON_SUPPORT
344 #define CONFIG_SPL_LIBDISK_SUPPORT
345 #define CONFIG_SPL_I2C_SUPPORT
346 #define CONFIG_SPL_LIBGENERIC_SUPPORT
347 #define CONFIG_SPL_MMC_SUPPORT
348 #define CONFIG_SPL_FAT_SUPPORT
349 #define CONFIG_SPL_SERIAL_SUPPORT
350 #define CONFIG_SPL_NAND_SUPPORT
351 #define CONFIG_SPL_NAND_BASE
352 #define CONFIG_SPL_NAND_DRIVERS
353 #define CONFIG_SPL_NAND_ECC
354 #define CONFIG_SPL_GPIO_SUPPORT
355 #define CONFIG_SPL_POWER_SUPPORT
356 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
357 
358 /* NAND boot config */
359 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
360 #define CONFIG_SYS_NAND_PAGE_COUNT	64
361 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
362 #define CONFIG_SYS_NAND_OOBSIZE		64
363 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
364 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
365 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
366 						10, 11, 12, 13}
367 #define CONFIG_SYS_NAND_ECCSIZE		512
368 #define CONFIG_SYS_NAND_ECCBYTES	3
369 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
370 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
371 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
372 
373 #endif				/* __CONFIG_H */
374