1 /* 2 * Configuration settings for the Gumstix Overo board. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 /* 11 * High Level Configuration Options 12 */ 13 #define CONFIG_OMAP /* in a TI OMAP core */ 14 #define CONFIG_OMAP34XX /* which is a 34XX */ 15 #define CONFIG_OMAP3_OVERO /* working with overo */ 16 #define CONFIG_OMAP_GPIO 17 #define CONFIG_OMAP_COMMON 18 19 #define CONFIG_SDRC /* The chip has SDRC controller */ 20 21 #include <asm/arch/cpu.h> /* get chip and board defs */ 22 #include <asm/arch/omap3.h> 23 24 /* 25 * Display CPU and Board information 26 */ 27 #define CONFIG_DISPLAY_CPUINFO 28 #define CONFIG_DISPLAY_BOARDINFO 29 30 /* Clock Defines */ 31 #define V_OSCK 26000000 /* Clock output from T2 */ 32 #define V_SCLK (V_OSCK >> 1) 33 34 #define CONFIG_MISC_INIT_R 35 36 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 37 #define CONFIG_SETUP_MEMORY_TAGS 38 #define CONFIG_INITRD_TAG 39 #define CONFIG_REVISION_TAG 40 41 #define CONFIG_OF_LIBFDT 42 43 /* 44 * Size of malloc() pool 45 */ 46 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 47 48 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands. 49 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */ 50 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15)) 51 52 /* 53 * Hardware drivers 54 */ 55 56 /* 57 * NS16550 Configuration 58 */ 59 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 60 61 #define CONFIG_SYS_NS16550 62 #define CONFIG_SYS_NS16550_SERIAL 63 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 64 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 65 66 /* 67 * select serial console configuration 68 */ 69 #define CONFIG_CONS_INDEX 3 70 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 71 #define CONFIG_SERIAL3 3 72 73 /* allow to overwrite serial and ethaddr */ 74 #define CONFIG_ENV_OVERWRITE 75 #define CONFIG_BAUDRATE 115200 76 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 77 115200} 78 #define CONFIG_GENERIC_MMC 79 #define CONFIG_MMC 80 #define CONFIG_OMAP_HSMMC 81 #define CONFIG_DOS_PARTITION 82 83 /* commands to include */ 84 #include <config_cmd_default.h> 85 86 #define CONFIG_CMD_CACHE 87 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 88 #define CONFIG_CMD_FAT /* FAT support */ 89 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 90 91 #define CONFIG_CMD_I2C /* I2C serial bus support */ 92 #define CONFIG_CMD_MMC /* MMC support */ 93 #define CONFIG_CMD_NAND /* NAND support */ 94 95 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 96 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 97 #undef CONFIG_CMD_IMI /* iminfo */ 98 #undef CONFIG_CMD_IMLS /* List all found images */ 99 #undef CONFIG_CMD_NFS /* NFS support */ 100 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 101 102 #ifdef CONFIG_CMD_NAND 103 104 #define CONFIG_CMD_MTDPARTS /* MTD partition support */ 105 #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */ 106 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 107 108 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 109 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 110 111 #define CONFIG_MTD_DEVICE /* required by CONFIG_CMD_MTDPARTS */ 112 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 113 114 /* NAND block size is 128 KiB. Synchronize these values with 115 * overo_nand_partitions in mach-omap2/board-overo.c in Linux: 116 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB 117 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB 118 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB 119 * linux 64 * NAND_BLOCK_SIZE = 8 MiB 120 * rootfs remainder 121 */ 122 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 123 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 124 "512k(xloader)," \ 125 "1792k(u-boot)," \ 126 "256k(environ)," \ 127 "8m(linux)," \ 128 "-(rootfs)" 129 #else /* CONFIG_CMD_NAND */ 130 #define MTDPARTS_DEFAULT 131 #endif /* CONFIG_CMD_NAND */ 132 133 #define CONFIG_SYS_NO_FLASH 134 #define CONFIG_SYS_I2C 135 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 136 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 137 #define CONFIG_SYS_I2C_OMAP34XX 138 139 /* 140 * TWL4030 141 */ 142 #define CONFIG_TWL4030_POWER 143 #define CONFIG_TWL4030_LED 144 145 /* 146 * Board NAND Info. 147 */ 148 #define CONFIG_SYS_NAND_QUIET_TEST 149 #define CONFIG_NAND_OMAP_GPMC 150 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 151 /* to access nand */ 152 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 153 /* to access nand */ 154 /* at CS0 */ 155 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 156 /* devices */ 157 /* Environment information */ 158 #define CONFIG_BOOTDELAY 5 159 160 #define CONFIG_EXTRA_ENV_SETTINGS \ 161 "loadaddr=0x82000000\0" \ 162 "console=ttyO2,115200n8\0" \ 163 "mpurate=500\0" \ 164 "optargs=\0" \ 165 "vram=12M\0" \ 166 "dvimode=1024x768MR-16@60\0" \ 167 "defaultdisplay=dvi\0" \ 168 "mmcdev=0\0" \ 169 "mmcroot=/dev/mmcblk0p2 rw\0" \ 170 "mmcrootfstype=ext3 rootwait\0" \ 171 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 172 "nandrootfstype=ubifs\0" \ 173 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 174 "mmcargs=setenv bootargs console=${console} " \ 175 "${optargs} " \ 176 "mpurate=${mpurate} " \ 177 "vram=${vram} " \ 178 "omapfb.mode=dvi:${dvimode} " \ 179 "omapdss.def_disp=${defaultdisplay} " \ 180 "root=${mmcroot} " \ 181 "rootfstype=${mmcrootfstype}\0" \ 182 "nandargs=setenv bootargs console=${console} " \ 183 "${optargs} " \ 184 "mpurate=${mpurate} " \ 185 "vram=${vram} " \ 186 "omapfb.mode=dvi:${dvimode} " \ 187 "omapdss.def_disp=${defaultdisplay} " \ 188 "root=${nandroot} " \ 189 "rootfstype=${nandrootfstype}\0" \ 190 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 191 "bootscript=echo Running bootscript from mmc ...; " \ 192 "source ${loadaddr}\0" \ 193 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ 194 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ 195 "env import -t ${loadaddr} ${filesize}\0" \ 196 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 197 "mmcboot=echo Booting from mmc ...; " \ 198 "run mmcargs; " \ 199 "bootm ${loadaddr}\0" \ 200 "nandboot=echo Booting from nand ...; " \ 201 "run nandargs; " \ 202 "nand read ${loadaddr} linux; " \ 203 "bootm ${loadaddr}\0" \ 204 205 #define CONFIG_BOOTCOMMAND \ 206 "mmc dev ${mmcdev}; if mmc rescan; then " \ 207 "if run loadbootscript; then " \ 208 "run bootscript; " \ 209 "else " \ 210 "if run loadbootenv; then " \ 211 "run importbootenv; " \ 212 "if test -n ${uenvcmd}; then " \ 213 "echo Running uenvcmd ...;" \ 214 "run uenvcmd;" \ 215 "fi;" \ 216 "fi;" \ 217 "if run loaduimage; then " \ 218 "run mmcboot; " \ 219 "else run nandboot; " \ 220 "fi; " \ 221 "fi; " \ 222 "else run nandboot; fi" 223 224 #define CONFIG_AUTO_COMPLETE 1 225 /* 226 * Miscellaneous configurable options 227 */ 228 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 229 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 230 #define CONFIG_SYS_PROMPT "Overo # " 231 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 232 /* Print Buffer Size */ 233 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 234 sizeof(CONFIG_SYS_PROMPT) + 16) 235 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 236 /* args */ 237 /* Boot Argument Buffer Size */ 238 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 239 /* memtest works on */ 240 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 241 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 242 0x01F00000) /* 31MB */ 243 244 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 245 /* address */ 246 /* 247 * OMAP3 has 12 GP timers, they can be driven by the system clock 248 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 249 * This rate is divided by a local divisor. 250 */ 251 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 252 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 253 254 /*----------------------------------------------------------------------- 255 * Physical Memory Map 256 */ 257 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 258 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 259 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 260 261 /*----------------------------------------------------------------------- 262 * FLASH and environment organization 263 */ 264 265 /* **** PISMO SUPPORT *** */ 266 267 /* Configure the PISMO */ 268 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 269 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 270 271 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 272 273 #if defined(CONFIG_CMD_NAND) 274 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 275 #endif 276 277 /* Monitor at start of flash */ 278 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 279 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 280 281 #define CONFIG_ENV_IS_IN_NAND 282 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */ 283 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */ 284 285 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 286 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 287 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 288 289 #if defined(CONFIG_CMD_NET) 290 /*---------------------------------------------------------------------------- 291 * SMSC9211 Ethernet from SMSC9118 family 292 *---------------------------------------------------------------------------- 293 */ 294 295 #define CONFIG_SMC911X 296 #define CONFIG_SMC911X_32_BIT 297 #define CONFIG_SMC911X_BASE 0x2C000000 298 299 #endif /* (CONFIG_CMD_NET) */ 300 301 /* 302 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader 303 * and older u-boot.bin with the new U-Boot SPL. 304 */ 305 #define CONFIG_SYS_TEXT_BASE 0x80008000 306 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 307 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 308 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 309 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 310 CONFIG_SYS_INIT_RAM_SIZE - \ 311 GENERATED_GBL_DATA_SIZE) 312 313 #define CONFIG_SYS_CACHELINE_SIZE 64 314 315 /* Defines for SPL */ 316 #define CONFIG_SPL 317 #define CONFIG_SPL_FRAMEWORK 318 #define CONFIG_SPL_NAND_SIMPLE 319 #define CONFIG_SPL_TEXT_BASE 0x40200800 320 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ 321 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 322 323 /* move malloc and bss high to prevent clashing with the main image */ 324 #define CONFIG_SYS_SPL_MALLOC_START 0x87000000 325 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 326 #define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */ 327 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 328 329 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 330 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 331 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 332 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 333 334 #define CONFIG_SPL_BOARD_INIT 335 #define CONFIG_SPL_LIBCOMMON_SUPPORT 336 #define CONFIG_SPL_LIBDISK_SUPPORT 337 #define CONFIG_SPL_I2C_SUPPORT 338 #define CONFIG_SPL_LIBGENERIC_SUPPORT 339 #define CONFIG_SPL_MMC_SUPPORT 340 #define CONFIG_SPL_FAT_SUPPORT 341 #define CONFIG_SPL_SERIAL_SUPPORT 342 #define CONFIG_SPL_NAND_SUPPORT 343 #define CONFIG_SPL_NAND_BASE 344 #define CONFIG_SPL_NAND_DRIVERS 345 #define CONFIG_SPL_NAND_ECC 346 #define CONFIG_SPL_GPIO_SUPPORT 347 #define CONFIG_SPL_POWER_SUPPORT 348 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 349 350 /* NAND boot config */ 351 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 352 #define CONFIG_SYS_NAND_PAGE_COUNT 64 353 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 354 #define CONFIG_SYS_NAND_OOBSIZE 64 355 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 356 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 357 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 358 10, 11, 12, 13} 359 #define CONFIG_SYS_NAND_ECCSIZE 512 360 #define CONFIG_SYS_NAND_ECCBYTES 3 361 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 362 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 363 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 364 365 #endif /* __CONFIG_H */ 366