xref: /rk3399_rockchip-uboot/include/configs/omap3_igep00x0.h (revision 4b9dc7c26b5a7e20c9be697f1ba3bb4ba995c643)
1f565be75SJavier Martinez Canillas /*
2f565be75SJavier Martinez Canillas  * Common configuration settings for IGEP technology based boards
3f565be75SJavier Martinez Canillas  *
4f565be75SJavier Martinez Canillas  * (C) Copyright 2012
5f565be75SJavier Martinez Canillas  * ISEE 2007 SL, <www.iseebcn.com>
6f565be75SJavier Martinez Canillas  *
7f565be75SJavier Martinez Canillas  * SPDX-License-Identifier:	GPL-2.0+
8f565be75SJavier Martinez Canillas  */
9f565be75SJavier Martinez Canillas 
10f565be75SJavier Martinez Canillas #ifndef __IGEP00X0_H
11f565be75SJavier Martinez Canillas #define __IGEP00X0_H
12f565be75SJavier Martinez Canillas 
13e37e954eSEnric Balletbò i Serra #define CONFIG_NR_DRAM_BANKS            2
14*4b9dc7c2SLadislav Michl #define CONFIG_NAND
15f565be75SJavier Martinez Canillas 
16e37e954eSEnric Balletbò i Serra #include <configs/ti_omap3_common.h>
17f565be75SJavier Martinez Canillas #include <asm/mach-types.h>
18f565be75SJavier Martinez Canillas 
19e7fbcbc2SEnric Balletbo i Serra /* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
20e7fbcbc2SEnric Balletbo i Serra #undef CONFIG_SPL_MAX_SIZE
21e7fbcbc2SEnric Balletbo i Serra #undef CONFIG_SPL_TEXT_BASE
22e7fbcbc2SEnric Balletbo i Serra 
23e7fbcbc2SEnric Balletbo i Serra #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
24e7fbcbc2SEnric Balletbo i Serra #define CONFIG_SPL_TEXT_BASE		0x40200000
25e7fbcbc2SEnric Balletbo i Serra 
26f565be75SJavier Martinez Canillas /*
27f565be75SJavier Martinez Canillas  * Display CPU and Board information
28f565be75SJavier Martinez Canillas  */
29f565be75SJavier Martinez Canillas #define CONFIG_DISPLAY_CPUINFO		1
30f565be75SJavier Martinez Canillas #define CONFIG_DISPLAY_BOARDINFO	1
31f565be75SJavier Martinez Canillas 
32f565be75SJavier Martinez Canillas #define CONFIG_MISC_INIT_R
33f565be75SJavier Martinez Canillas 
34f565be75SJavier Martinez Canillas #define CONFIG_REVISION_TAG		1
35f565be75SJavier Martinez Canillas 
3650bb94c9SEnric Balletbo i Serra /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */
3750bb94c9SEnric Balletbo i Serra #if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032)
38f3b4bc45SEnric Balletbo i Serra #define CONFIG_STATUS_LED
39f3b4bc45SEnric Balletbo i Serra #define CONFIG_BOARD_SPECIFIC_LED
40f3b4bc45SEnric Balletbo i Serra #define CONFIG_GPIO_LED
41f3b4bc45SEnric Balletbo i Serra #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
42f3b4bc45SEnric Balletbo i Serra #define RED_LED_GPIO 27
4350bb94c9SEnric Balletbo i Serra #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
44f3b4bc45SEnric Balletbo i Serra #define RED_LED_GPIO 16
4550bb94c9SEnric Balletbo i Serra #else
4650bb94c9SEnric Balletbo i Serra #error "status LED not defined for this machine."
47f3b4bc45SEnric Balletbo i Serra #endif
48f3b4bc45SEnric Balletbo i Serra #define RED_LED_DEV			0
49f3b4bc45SEnric Balletbo i Serra #define STATUS_LED_BIT			RED_LED_GPIO
50f3b4bc45SEnric Balletbo i Serra #define STATUS_LED_STATE		STATUS_LED_ON
51f3b4bc45SEnric Balletbo i Serra #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
52f3b4bc45SEnric Balletbo i Serra #define STATUS_LED_BOOT			RED_LED_DEV
5350bb94c9SEnric Balletbo i Serra #endif
54f565be75SJavier Martinez Canillas 
55dd1e8583SEnric Balletbo i Serra /* GPIO banks */
56dd1e8583SEnric Balletbo i Serra #define CONFIG_OMAP3_GPIO_3		/* GPIO64 .. 95 is in GPIO bank 3 */
57dd1e8583SEnric Balletbo i Serra #define CONFIG_OMAP3_GPIO_5		/* GPIO128..159 is in GPIO bank 5 */
58dd1e8583SEnric Balletbo i Serra #define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */
59dd1e8583SEnric Balletbo i Serra 
60f565be75SJavier Martinez Canillas /* USB */
6195de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_UDC		1
62f565be75SJavier Martinez Canillas #define CONFIG_USB_OMAP3		1
63f565be75SJavier Martinez Canillas #define CONFIG_TWL4030_USB		1
64f565be75SJavier Martinez Canillas 
65f565be75SJavier Martinez Canillas /* USB device configuration */
66f565be75SJavier Martinez Canillas #define CONFIG_USB_DEVICE		1
67f565be75SJavier Martinez Canillas #define CONFIG_USB_TTY			1
68f565be75SJavier Martinez Canillas #define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
69f565be75SJavier Martinez Canillas 
70f565be75SJavier Martinez Canillas /* Change these to suit your needs */
71f565be75SJavier Martinez Canillas #define CONFIG_USBD_VENDORID		0x0451
72f565be75SJavier Martinez Canillas #define CONFIG_USBD_PRODUCTID		0x5678
73f565be75SJavier Martinez Canillas #define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
74f565be75SJavier Martinez Canillas #define CONFIG_USBD_PRODUCT_NAME	"IGEP"
75f565be75SJavier Martinez Canillas 
76*4b9dc7c2SLadislav Michl #define CONFIG_CMD_MTDPARTS
77*4b9dc7c2SLadislav Michl #define CONFIG_CMD_ONENAND
78*4b9dc7c2SLadislav Michl #define CONFIG_CMD_UBI
79f565be75SJavier Martinez Canillas 
8040372244SEnric Balletbò i Serra #ifndef CONFIG_SPL_BUILD
81f565be75SJavier Martinez Canillas 
8240372244SEnric Balletbò i Serra /* Environment */
8340372244SEnric Balletbò i Serra #define ENV_DEVICE_SETTINGS \
8440372244SEnric Balletbò i Serra 	"stdin=serial\0" \
8540372244SEnric Balletbò i Serra 	"stdout=serial\0" \
8640372244SEnric Balletbò i Serra 	"stderr=serial\0"
8740372244SEnric Balletbò i Serra 
8840372244SEnric Balletbò i Serra #define MEM_LAYOUT_SETTINGS \
8940372244SEnric Balletbò i Serra 	DEFAULT_LINUX_BOOT_ENV \
9040372244SEnric Balletbò i Serra 	"scriptaddr=0x87E00000\0" \
9140372244SEnric Balletbò i Serra 	"pxefile_addr_r=0x87F00000\0"
9240372244SEnric Balletbò i Serra 
9340372244SEnric Balletbò i Serra #define BOOT_TARGET_DEVICES(func) \
9440372244SEnric Balletbò i Serra 	func(MMC, mmc, 0)
9540372244SEnric Balletbò i Serra 
9640372244SEnric Balletbò i Serra #include <config_distro_bootcmd.h>
9740372244SEnric Balletbò i Serra 
9840372244SEnric Balletbò i Serra #define CONFIG_EXTRA_ENV_SETTINGS \
9940372244SEnric Balletbò i Serra 	ENV_DEVICE_SETTINGS \
10040372244SEnric Balletbò i Serra 	MEM_LAYOUT_SETTINGS \
10140372244SEnric Balletbò i Serra 	BOOTENV
10240372244SEnric Balletbò i Serra 
10340372244SEnric Balletbò i Serra #endif
104f565be75SJavier Martinez Canillas 
105f565be75SJavier Martinez Canillas /*
106f565be75SJavier Martinez Canillas  * SMSC911x Ethernet
107f565be75SJavier Martinez Canillas  */
108f565be75SJavier Martinez Canillas #if defined(CONFIG_CMD_NET)
109f565be75SJavier Martinez Canillas #define CONFIG_SMC911X
110f565be75SJavier Martinez Canillas #define CONFIG_SMC911X_32_BIT
111f565be75SJavier Martinez Canillas #define CONFIG_SMC911X_BASE		0x2C000000
112f565be75SJavier Martinez Canillas #endif /* (CONFIG_CMD_NET) */
113f565be75SJavier Martinez Canillas 
114*4b9dc7c2SLadislav Michl #define CONFIG_RBTREE
115*4b9dc7c2SLadislav Michl #define CONFIG_MTD_PARTITIONS
116*4b9dc7c2SLadislav Michl 
117*4b9dc7c2SLadislav Michl /* OneNAND config */
118f565be75SJavier Martinez Canillas #define CONFIG_SPL_ONENAND_SUPPORT
119*4b9dc7c2SLadislav Michl #define CONFIG_USE_ONENAND_BOARD_INIT
120*4b9dc7c2SLadislav Michl #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
121*4b9dc7c2SLadislav Michl #define CONFIG_SYS_ONENAND_BLOCK_SIZE	(128*1024)
122f565be75SJavier Martinez Canillas 
123*4b9dc7c2SLadislav Michl /* NAND config */
124*4b9dc7c2SLadislav Michl #define CONFIG_SPL_NAND_SUPPORT
125*4b9dc7c2SLadislav Michl #define CONFIG_SPL_OMAP3_ID_NAND
12655f1b39fSStefano Babic #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
127f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_5_ADDR_CYCLE
128f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_PAGE_COUNT	64
129f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_PAGE_SIZE	2048
130f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_OOBSIZE		64
131f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
13281fd858cSLadislav Michl #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
133f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, \
13481fd858cSLadislav Michl 					 10, 11, 12, 13, 14, 15, 16, 17, \
13581fd858cSLadislav Michl 					 18, 19, 20, 21, 22, 23, 24, 25, \
13681fd858cSLadislav Michl 					 26, 27, 28, 29, 30, 31, 32, 33, \
13781fd858cSLadislav Michl 					 34, 35, 36, 37, 38, 39, 40, 41, \
13881fd858cSLadislav Michl 					 42, 43, 44, 45, 46, 47, 48, 49, \
13981fd858cSLadislav Michl 					 50, 51, 52, 53, 54, 55, 56, 57, }
140f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_ECCSIZE		512
14181fd858cSLadislav Michl #define CONFIG_SYS_NAND_ECCBYTES	14
14281fd858cSLadislav Michl #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
14381fd858cSLadislav Michl #define CONFIG_NAND_OMAP_GPMC
14481fd858cSLadislav Michl #define CONFIG_BCH
14581fd858cSLadislav Michl 
146*4b9dc7c2SLadislav Michl /* UBI configuration */
147*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI			1
148*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_MAX_VOL_LEBS	256
149*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_MAX_PEB_SIZE	(256*1024)
150*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_MAX_PEBS		4096
151*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_VOL_IDS		8
152*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_LOAD_MONITOR_ID	0
153*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_LOAD_KERNEL_ID	3
154*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_LOAD_ARGS_ID	4
155*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_PEB_OFFSET	4
156*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_VID_OFFSET	512
157*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_LEB_START	2048
158*4b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_INFO_ADDR	0x88080000
159*4b9dc7c2SLadislav Michl 
160*4b9dc7c2SLadislav Michl /* environment organization */
161*4b9dc7c2SLadislav Michl #define CONFIG_ENV_IS_IN_UBI		1
162*4b9dc7c2SLadislav Michl #define CONFIG_ENV_UBI_PART		"UBI"
163*4b9dc7c2SLadislav Michl #define CONFIG_ENV_UBI_VOLUME		"config"
164*4b9dc7c2SLadislav Michl #define CONFIG_ENV_UBI_VOLUME_REDUND	"config_r"
165*4b9dc7c2SLadislav Michl #define CONFIG_UBI_SILENCE_MSG		1
166*4b9dc7c2SLadislav Michl #define CONFIG_UBIFS_SILENCE_MSG	1
167*4b9dc7c2SLadislav Michl #define CONFIG_ENV_SIZE			(32*1024)
168*4b9dc7c2SLadislav Michl 
169*4b9dc7c2SLadislav Michl #undef CONFIG_SPL_EXT_SUPPORT
170f565be75SJavier Martinez Canillas 
171f565be75SJavier Martinez Canillas #endif /* __IGEP00X0_H */
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