xref: /rk3399_rockchip-uboot/include/configs/omap3_igep00x0.h (revision 577968e5669858e1d5bcb651ab28d60d20166252)
1f565be75SJavier Martinez Canillas /*
2f565be75SJavier Martinez Canillas  * Common configuration settings for IGEP technology based boards
3f565be75SJavier Martinez Canillas  *
4f565be75SJavier Martinez Canillas  * (C) Copyright 2012
5f565be75SJavier Martinez Canillas  * ISEE 2007 SL, <www.iseebcn.com>
6f565be75SJavier Martinez Canillas  *
7f565be75SJavier Martinez Canillas  * SPDX-License-Identifier:	GPL-2.0+
8f565be75SJavier Martinez Canillas  */
9f565be75SJavier Martinez Canillas 
10f565be75SJavier Martinez Canillas #ifndef __IGEP00X0_H
11f565be75SJavier Martinez Canillas #define __IGEP00X0_H
12f565be75SJavier Martinez Canillas 
13e37e954eSEnric Balletbò i Serra #define CONFIG_NR_DRAM_BANKS            2
14f565be75SJavier Martinez Canillas 
15e37e954eSEnric Balletbò i Serra #include <configs/ti_omap3_common.h>
16f565be75SJavier Martinez Canillas 
17fa2f81b0STom Rini /*
18fa2f81b0STom Rini  * We are only ever GP parts and will utilize all of the "downloaded image"
19fa2f81b0STom Rini  * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
20fa2f81b0STom Rini  */
21e7fbcbc2SEnric Balletbo i Serra #undef CONFIG_SPL_TEXT_BASE
22e7fbcbc2SEnric Balletbo i Serra #define CONFIG_SPL_TEXT_BASE		0x40200000
23e7fbcbc2SEnric Balletbo i Serra 
24f565be75SJavier Martinez Canillas #define CONFIG_MISC_INIT_R
25f565be75SJavier Martinez Canillas 
26f565be75SJavier Martinez Canillas #define CONFIG_REVISION_TAG		1
27f565be75SJavier Martinez Canillas 
28*195dc231SPau Pajuelo /* GPIO banks */
29*195dc231SPau Pajuelo #define CONFIG_OMAP3_GPIO_2		/* GPIO32..63   is in GPIO bank 2 */
30*195dc231SPau Pajuelo #define CONFIG_OMAP3_GPIO_4		/* GPIO96..127  is in GPIO bank 4 */
31*195dc231SPau Pajuelo 
32*195dc231SPau Pajuelo /* TPS65950 */
33*195dc231SPau Pajuelo #define PBIASLITEVMODE1			(1 << 8)
34*195dc231SPau Pajuelo 
35*195dc231SPau Pajuelo /* LED */
36*195dc231SPau Pajuelo #define IGEP0020_GPIO_LED		27
37*195dc231SPau Pajuelo #define IGEP0030_GPIO_LED		16
38*195dc231SPau Pajuelo 
39*195dc231SPau Pajuelo /* Board and revision detection GPIOs */
40*195dc231SPau Pajuelo #define IGEP0030_USB_TRANSCEIVER_RESET		54
41*195dc231SPau Pajuelo #define GPIO_IGEP00X0_BOARD_DETECTION		28
42*195dc231SPau Pajuelo #define GPIO_IGEP00X0_REVISION_DETECTION	129
43f565be75SJavier Martinez Canillas 
44f565be75SJavier Martinez Canillas /* USB */
4595de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_UDC		1
46f565be75SJavier Martinez Canillas #define CONFIG_USB_OMAP3		1
47f565be75SJavier Martinez Canillas #define CONFIG_TWL4030_USB		1
48f565be75SJavier Martinez Canillas 
49f565be75SJavier Martinez Canillas /* USB device configuration */
50f565be75SJavier Martinez Canillas #define CONFIG_USB_DEVICE		1
51f565be75SJavier Martinez Canillas #define CONFIG_USB_TTY			1
52f565be75SJavier Martinez Canillas 
53f565be75SJavier Martinez Canillas /* Change these to suit your needs */
54f565be75SJavier Martinez Canillas #define CONFIG_USBD_VENDORID		0x0451
55f565be75SJavier Martinez Canillas #define CONFIG_USBD_PRODUCTID		0x5678
56f565be75SJavier Martinez Canillas #define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
57f565be75SJavier Martinez Canillas #define CONFIG_USBD_PRODUCT_NAME	"IGEP"
58f565be75SJavier Martinez Canillas 
5940372244SEnric Balletbò i Serra #ifndef CONFIG_SPL_BUILD
60f565be75SJavier Martinez Canillas 
6140372244SEnric Balletbò i Serra /* Environment */
6240372244SEnric Balletbò i Serra #define ENV_DEVICE_SETTINGS \
6340372244SEnric Balletbò i Serra 	"stdin=serial\0" \
6440372244SEnric Balletbò i Serra 	"stdout=serial\0" \
6540372244SEnric Balletbò i Serra 	"stderr=serial\0"
6640372244SEnric Balletbò i Serra 
6740372244SEnric Balletbò i Serra #define MEM_LAYOUT_SETTINGS \
6840372244SEnric Balletbò i Serra 	DEFAULT_LINUX_BOOT_ENV \
6940372244SEnric Balletbò i Serra 	"scriptaddr=0x87E00000\0" \
7040372244SEnric Balletbò i Serra 	"pxefile_addr_r=0x87F00000\0"
7140372244SEnric Balletbò i Serra 
7240372244SEnric Balletbò i Serra #define BOOT_TARGET_DEVICES(func) \
7340372244SEnric Balletbò i Serra 	func(MMC, mmc, 0)
7440372244SEnric Balletbò i Serra 
75*195dc231SPau Pajuelo #define CONFIG_BOOTCOMMAND \
76*195dc231SPau Pajuelo 	"run findfdt; " \
77*195dc231SPau Pajuelo 	"run distro_bootcmd"
78*195dc231SPau Pajuelo 
7940372244SEnric Balletbò i Serra #include <config_distro_bootcmd.h>
8040372244SEnric Balletbò i Serra 
81*195dc231SPau Pajuelo #define ENV_FINDFDT \
82*195dc231SPau Pajuelo 	"findfdt="\
83*195dc231SPau Pajuelo 		"if test ${board_name} = igep0020; then " \
84*195dc231SPau Pajuelo 			"if test ${board_rev} = F; then " \
85*195dc231SPau Pajuelo 				"setenv fdtfile omap3-igep0020-rev-f.dtb; " \
86*195dc231SPau Pajuelo 			"else " \
87*195dc231SPau Pajuelo 				"setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
88*195dc231SPau Pajuelo 		"if test ${board_name} = igep0030; then " \
89*195dc231SPau Pajuelo 			"if test ${board_rev} = G; then " \
90*195dc231SPau Pajuelo 				"setenv fdtfile omap3-igep0030-rev-g.dtb; " \
91*195dc231SPau Pajuelo 			"else " \
92*195dc231SPau Pajuelo 				"setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
93*195dc231SPau Pajuelo 		"if test ${fdtfile} = ''; then " \
94*195dc231SPau Pajuelo 			"echo WARNING: Could not determine device tree to use; fi; \0"
95*195dc231SPau Pajuelo 
9640372244SEnric Balletbò i Serra #define CONFIG_EXTRA_ENV_SETTINGS \
97*195dc231SPau Pajuelo 	ENV_FINDFDT \
9840372244SEnric Balletbò i Serra 	ENV_DEVICE_SETTINGS \
9940372244SEnric Balletbò i Serra 	MEM_LAYOUT_SETTINGS \
10040372244SEnric Balletbò i Serra 	BOOTENV
10140372244SEnric Balletbò i Serra 
10240372244SEnric Balletbò i Serra #endif
103f565be75SJavier Martinez Canillas 
104a5debaa3SLadislav Michl #define CONFIG_SYS_MTDPARTS_RUNTIME
1054b9dc7c2SLadislav Michl 
1064b9dc7c2SLadislav Michl /* OneNAND config */
1074b9dc7c2SLadislav Michl #define CONFIG_USE_ONENAND_BOARD_INIT
1084b9dc7c2SLadislav Michl #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
1094b9dc7c2SLadislav Michl #define CONFIG_SYS_ONENAND_BLOCK_SIZE	(128*1024)
110f565be75SJavier Martinez Canillas 
1114b9dc7c2SLadislav Michl /* NAND config */
112f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_5_ADDR_CYCLE
113f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_PAGE_COUNT	64
114f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_PAGE_SIZE	2048
115f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_OOBSIZE		64
116f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
11781fd858cSLadislav Michl #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
118f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, \
11981fd858cSLadislav Michl 					 10, 11, 12, 13, 14, 15, 16, 17, \
12081fd858cSLadislav Michl 					 18, 19, 20, 21, 22, 23, 24, 25, \
12181fd858cSLadislav Michl 					 26, 27, 28, 29, 30, 31, 32, 33, \
12281fd858cSLadislav Michl 					 34, 35, 36, 37, 38, 39, 40, 41, \
12381fd858cSLadislav Michl 					 42, 43, 44, 45, 46, 47, 48, 49, \
12481fd858cSLadislav Michl 					 50, 51, 52, 53, 54, 55, 56, 57, }
125f565be75SJavier Martinez Canillas #define CONFIG_SYS_NAND_ECCSIZE		512
12681fd858cSLadislav Michl #define CONFIG_SYS_NAND_ECCBYTES	14
12781fd858cSLadislav Michl #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
12881fd858cSLadislav Michl 
1294b9dc7c2SLadislav Michl /* UBI configuration */
1304b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI			1
1314b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_MAX_VOL_LEBS	256
1324b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_MAX_PEB_SIZE	(256*1024)
1334b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_MAX_PEBS		4096
1344b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_VOL_IDS		8
1354b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_LOAD_MONITOR_ID	0
1364b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_LOAD_KERNEL_ID	3
1374b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_LOAD_ARGS_ID	4
1384b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_PEB_OFFSET	4
1394b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_VID_OFFSET	512
1404b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_LEB_START	2048
1414b9dc7c2SLadislav Michl #define CONFIG_SPL_UBI_INFO_ADDR	0x88080000
1424b9dc7c2SLadislav Michl 
1434b9dc7c2SLadislav Michl /* environment organization */
1444b9dc7c2SLadislav Michl #define CONFIG_ENV_UBI_PART		"UBI"
1454b9dc7c2SLadislav Michl #define CONFIG_ENV_UBI_VOLUME		"config"
1464b9dc7c2SLadislav Michl #define CONFIG_ENV_UBI_VOLUME_REDUND	"config_r"
1474b9dc7c2SLadislav Michl #define CONFIG_ENV_SIZE			(32*1024)
1484b9dc7c2SLadislav Michl 
149f565be75SJavier Martinez Canillas #endif /* __IGEP00X0_H */
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