1 /* 2 * Configuration settings for the TI OMAP3 EVM board. 3 * 4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Author : 7 * Manikandan Pillai <mani.pillai@ti.com> 8 * Derived from Beagle Board and 3430 SDP code by 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <khasim@ti.com> 11 * 12 * Manikandan Pillai <mani.pillai@ti.com> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 #ifndef __OMAP3EVM_CONFIG_H 18 #define __OMAP3EVM_CONFIG_H 19 20 #include <asm/arch/cpu.h> 21 #include <asm/arch/omap.h> 22 23 /* ---------------------------------------------------------------------------- 24 * Supported U-Boot commands 25 * ---------------------------------------------------------------------------- 26 */ 27 28 #define CONFIG_CMD_JFFS2 29 30 #define CONFIG_CMD_NAND 31 32 /* ---------------------------------------------------------------------------- 33 * Supported U-Boot features 34 * ---------------------------------------------------------------------------- 35 */ 36 #define CONFIG_SYS_LONGHELP 37 38 /* Display CPU and Board information */ 39 #define CONFIG_DISPLAY_CPUINFO 40 #define CONFIG_DISPLAY_BOARDINFO 41 42 /* Allow to overwrite serial and ethaddr */ 43 #define CONFIG_ENV_OVERWRITE 44 45 /* Add auto-completion support */ 46 #define CONFIG_AUTO_COMPLETE 47 48 /* ---------------------------------------------------------------------------- 49 * Supported hardware 50 * ---------------------------------------------------------------------------- 51 */ 52 53 /* MMC */ 54 #define CONFIG_MMC 55 #define CONFIG_GENERIC_MMC 56 #define CONFIG_OMAP_HSMMC 57 58 /* SPL */ 59 #define CONFIG_SPL_MMC_SUPPORT 60 #define CONFIG_SPL_FAT_SUPPORT 61 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 62 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 63 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 64 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 65 66 /* Partition tables */ 67 #define CONFIG_EFI_PARTITION 68 #define CONFIG_DOS_PARTITION 69 70 /* USB 71 * 72 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard 73 * Enable CONFIG_USB_MUSB_UDD for Device functionalities. 74 */ 75 #define CONFIG_USB_OMAP3 76 #define CONFIG_USB_MUSB_HCD 77 /* #define CONFIG_USB_MUSB_UDC */ 78 79 /* NAND SPL */ 80 #define CONFIG_SPL_NAND_SIMPLE 81 #define CONFIG_SPL_NAND_SUPPORT 82 #define CONFIG_SPL_NAND_BASE 83 #define CONFIG_SPL_NAND_DRIVERS 84 #define CONFIG_SPL_NAND_ECC 85 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 86 #define CONFIG_SYS_NAND_PAGE_COUNT 64 87 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 88 #define CONFIG_SYS_NAND_OOBSIZE 64 89 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 90 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 91 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 92 10, 11, 12, 13} 93 #define CONFIG_SYS_NAND_ECCSIZE 512 94 #define CONFIG_SYS_NAND_ECCBYTES 3 95 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 96 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 97 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 98 99 /* 100 * High level configuration options 101 */ 102 #define CONFIG_OMAP /* This is TI OMAP core */ 103 #define CONFIG_OMAP_GPIO 104 #define CONFIG_OMAP_COMMON 105 /* Common ARM Erratas */ 106 #define CONFIG_ARM_ERRATA_454179 107 #define CONFIG_ARM_ERRATA_430973 108 #define CONFIG_ARM_ERRATA_621766 109 110 #define CONFIG_SDRC /* The chip has SDRC controller */ 111 112 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ 113 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ 114 115 /* 116 * Clock related definitions 117 */ 118 #define V_OSCK 26000000 /* Clock output from T2 */ 119 #define V_SCLK (V_OSCK >> 1) 120 121 /* 122 * OMAP3 has 12 GP timers, they can be driven by the system clock 123 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 124 * This rate is divided by a local divisor. 125 */ 126 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 127 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 128 129 /* Size of environment - 128KB */ 130 #define CONFIG_ENV_SIZE (128 << 10) 131 132 /* Size of malloc pool */ 133 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 134 135 /* 136 * Physical Memory Map 137 * Note 1: CS1 may or may not be populated 138 * Note 2: SDRAM size is expected to be at least 32MB 139 */ 140 #define CONFIG_NR_DRAM_BANKS 2 141 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 142 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 143 144 /* Limits for memtest */ 145 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 146 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 147 0x01F00000) /* 31MB */ 148 149 /* Default load address */ 150 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) 151 152 /* ----------------------------------------------------------------------------- 153 * Hardware drivers 154 * ----------------------------------------------------------------------------- 155 */ 156 157 /* 158 * NS16550 Configuration 159 */ 160 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 161 162 #define CONFIG_SYS_NS16550_SERIAL 163 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 164 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 165 166 /* 167 * select serial console configuration 168 */ 169 #define CONFIG_CONS_INDEX 1 170 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ 171 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 172 #define CONFIG_BAUDRATE 115200 173 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 174 115200} 175 176 /* 177 * I2C 178 */ 179 #define CONFIG_SYS_I2C 180 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 181 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 182 #define CONFIG_SYS_I2C_OMAP34XX 183 184 /* 185 * PISMO support 186 */ 187 /* Monitor at start of flash - Reserve 2 sectors */ 188 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 189 190 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 191 192 /* Start location & size of environment */ 193 #define ONENAND_ENV_OFFSET 0x260000 194 #define SMNAND_ENV_OFFSET 0x260000 195 196 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 197 198 /* 199 * NAND 200 */ 201 /* Physical address to access NAND */ 202 #define CONFIG_SYS_NAND_ADDR NAND_BASE 203 204 /* Physical address to access NAND at CS0 */ 205 #define CONFIG_SYS_NAND_BASE NAND_BASE 206 207 /* Max number of NAND devices */ 208 #define CONFIG_SYS_MAX_NAND_DEVICE 1 209 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 210 /* Timeout values (in ticks) */ 211 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) 212 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) 213 214 /* Flash banks JFFS2 should use */ 215 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 216 CONFIG_SYS_MAX_NAND_DEVICE) 217 218 #define CONFIG_SYS_JFFS2_MEM_NAND 219 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 220 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 221 222 #define CONFIG_JFFS2_NAND 223 /* nand device jffs2 lives on */ 224 #define CONFIG_JFFS2_DEV "nand0" 225 /* Start of jffs2 partition */ 226 #define CONFIG_JFFS2_PART_OFFSET 0x680000 227 /* Size of jffs2 partition */ 228 #define CONFIG_JFFS2_PART_SIZE 0xf980000 229 230 /* 231 * USB 232 */ 233 #ifdef CONFIG_USB_OMAP3 234 235 #ifdef CONFIG_USB_MUSB_HCD 236 237 #define CONGIG_CMD_STORAGE 238 239 #ifdef CONFIG_USB_KEYBOARD 240 #define CONFIG_SYS_USB_EVENT_POLL 241 #define CONFIG_PREBOOT "usb start" 242 #endif /* CONFIG_USB_KEYBOARD */ 243 244 #endif /* CONFIG_USB_MUSB_HCD */ 245 246 #ifdef CONFIG_USB_MUSB_UDC 247 /* USB device configuration */ 248 #define CONFIG_USB_DEVICE 249 #define CONFIG_USB_TTY 250 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 251 252 /* Change these to suit your needs */ 253 #define CONFIG_USBD_VENDORID 0x0451 254 #define CONFIG_USBD_PRODUCTID 0x5678 255 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 256 #define CONFIG_USBD_PRODUCT_NAME "EVM" 257 #endif /* CONFIG_USB_MUSB_UDC */ 258 259 #endif /* CONFIG_USB_OMAP3 */ 260 261 /* ---------------------------------------------------------------------------- 262 * U-Boot features 263 * ---------------------------------------------------------------------------- 264 */ 265 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */ 266 267 #define CONFIG_MISC_INIT_R 268 269 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 270 #define CONFIG_SETUP_MEMORY_TAGS 271 #define CONFIG_INITRD_TAG 272 #define CONFIG_REVISION_TAG 273 274 /* Size of Console IO buffer */ 275 #define CONFIG_SYS_CBSIZE 512 276 277 /* Size of print buffer */ 278 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 279 sizeof(CONFIG_SYS_PROMPT) + 16) 280 281 /* Size of bootarg buffer */ 282 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 283 284 #define CONFIG_BOOTFILE "uImage" 285 286 /* 287 * NAND / OneNAND 288 */ 289 #if defined(CONFIG_CMD_NAND) 290 #define CONFIG_SYS_FLASH_BASE NAND_BASE 291 292 #define CONFIG_NAND_OMAP_GPMC 293 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 294 #elif defined(CONFIG_CMD_ONENAND) 295 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP 296 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 297 #endif 298 299 #if !defined(CONFIG_ENV_IS_NOWHERE) 300 #if defined(CONFIG_CMD_NAND) 301 #define CONFIG_ENV_IS_IN_NAND 302 #elif defined(CONFIG_CMD_ONENAND) 303 #define CONFIG_ENV_IS_IN_ONENAND 304 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET 305 #endif 306 #endif /* CONFIG_ENV_IS_NOWHERE */ 307 308 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 309 310 #if defined(CONFIG_CMD_NET) 311 312 /* Ethernet (SMSC9115 from SMSC9118 family) */ 313 #define CONFIG_SMC911X 314 #define CONFIG_SMC911X_32_BIT 315 #define CONFIG_SMC911X_BASE 0x2C000000 316 317 /* BOOTP fields */ 318 #define CONFIG_BOOTP_SUBNETMASK 0x00000001 319 #define CONFIG_BOOTP_GATEWAY 0x00000002 320 #define CONFIG_BOOTP_HOSTNAME 0x00000004 321 #define CONFIG_BOOTP_BOOTPATH 0x00000010 322 323 #endif /* CONFIG_CMD_NET */ 324 325 /* Support for relocation */ 326 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 327 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 328 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 329 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 330 CONFIG_SYS_INIT_RAM_SIZE - \ 331 GENERATED_GBL_DATA_SIZE) 332 333 /* ----------------------------------------------------------------------------- 334 * Board specific 335 * ----------------------------------------------------------------------------- 336 */ 337 #define CONFIG_SYS_NO_FLASH 338 339 /* Uncomment to define the board revision statically */ 340 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ 341 342 /* Defines for SPL */ 343 #define CONFIG_SPL_FRAMEWORK 344 #define CONFIG_SPL_TEXT_BASE 0x40200800 345 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 346 CONFIG_SPL_TEXT_BASE) 347 348 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 349 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 350 351 #define CONFIG_SPL_BOARD_INIT 352 #define CONFIG_SPL_LIBCOMMON_SUPPORT 353 #define CONFIG_SPL_LIBDISK_SUPPORT 354 #define CONFIG_SPL_I2C_SUPPORT 355 #define CONFIG_SPL_LIBGENERIC_SUPPORT 356 #define CONFIG_SPL_SERIAL_SUPPORT 357 #define CONFIG_SPL_POWER_SUPPORT 358 #define CONFIG_SPL_OMAP3_ID_NAND 359 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 360 361 /* 362 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 363 * 64 bytes before this address should be set aside for u-boot.img's 364 * header. That is 0x800FFFC0--0x80100000 should not be used for any 365 * other needs. 366 */ 367 #define CONFIG_SYS_TEXT_BASE 0x80100000 368 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 369 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 370 371 /* ----------------------------------------------------------------------------- 372 * Default environment 373 * ----------------------------------------------------------------------------- 374 */ 375 376 #define CONFIG_EXTRA_ENV_SETTINGS \ 377 "loadaddr=0x82000000\0" \ 378 "usbtty=cdc_acm\0" \ 379 "mmcdev=0\0" \ 380 "console=ttyO0,115200n8\0" \ 381 "mmcargs=setenv bootargs console=${console} " \ 382 "root=/dev/mmcblk0p2 rw " \ 383 "rootfstype=ext3 rootwait\0" \ 384 "nandargs=setenv bootargs console=${console} " \ 385 "root=/dev/mtdblock4 rw " \ 386 "rootfstype=jffs2\0" \ 387 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 388 "bootscript=echo Running bootscript from mmc ...; " \ 389 "source ${loadaddr}\0" \ 390 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 391 "mmcboot=echo Booting from mmc ...; " \ 392 "run mmcargs; " \ 393 "bootm ${loadaddr}\0" \ 394 "nandboot=echo Booting from nand ...; " \ 395 "run nandargs; " \ 396 "onenand read ${loadaddr} 280000 400000; " \ 397 "bootm ${loadaddr}\0" \ 398 399 #define CONFIG_BOOTCOMMAND \ 400 "mmc dev ${mmcdev}; if mmc rescan; then " \ 401 "if run loadbootscript; then " \ 402 "run bootscript; " \ 403 "else " \ 404 "if run loaduimage; then " \ 405 "run mmcboot; " \ 406 "else run nandboot; " \ 407 "fi; " \ 408 "fi; " \ 409 "else run nandboot; fi" 410 411 #endif /* __OMAP3EVM_CONFIG_H */ 412