1 /* 2 * Configuration settings for the TI OMAP3 EVM board. 3 * 4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Author : 7 * Manikandan Pillai <mani.pillai@ti.com> 8 * Derived from Beagle Board and 3430 SDP code by 9 * Richard Woodruff <r-woodruff2@ti.com> 10 * Syed Mohammed Khasim <khasim@ti.com> 11 * 12 * Manikandan Pillai <mani.pillai@ti.com> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 #ifndef __OMAP3EVM_CONFIG_H 18 #define __OMAP3EVM_CONFIG_H 19 20 #include <asm/arch/cpu.h> 21 #include <asm/arch/omap.h> 22 23 /* ---------------------------------------------------------------------------- 24 * Supported U-Boot commands 25 * ---------------------------------------------------------------------------- 26 */ 27 28 #define CONFIG_CMD_JFFS2 29 30 #define CONFIG_CMD_NAND 31 32 /* ---------------------------------------------------------------------------- 33 * Supported U-Boot features 34 * ---------------------------------------------------------------------------- 35 */ 36 #define CONFIG_SYS_LONGHELP 37 38 /* Allow to overwrite serial and ethaddr */ 39 #define CONFIG_ENV_OVERWRITE 40 41 /* Add auto-completion support */ 42 #define CONFIG_AUTO_COMPLETE 43 44 /* ---------------------------------------------------------------------------- 45 * Supported hardware 46 * ---------------------------------------------------------------------------- 47 */ 48 49 /* MMC */ 50 #define CONFIG_MMC 51 #define CONFIG_GENERIC_MMC 52 #define CONFIG_OMAP_HSMMC 53 54 /* SPL */ 55 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 56 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 57 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 58 59 /* Partition tables */ 60 #define CONFIG_EFI_PARTITION 61 #define CONFIG_DOS_PARTITION 62 63 /* USB 64 * 65 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard 66 * Enable CONFIG_USB_MUSB_UDD for Device functionalities. 67 */ 68 #define CONFIG_USB_OMAP3 69 #define CONFIG_USB_MUSB_HCD 70 /* #define CONFIG_USB_MUSB_UDC */ 71 72 /* NAND SPL */ 73 #define CONFIG_SPL_NAND_SIMPLE 74 #define CONFIG_SPL_NAND_BASE 75 #define CONFIG_SPL_NAND_DRIVERS 76 #define CONFIG_SPL_NAND_ECC 77 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 78 #define CONFIG_SYS_NAND_PAGE_COUNT 64 79 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 80 #define CONFIG_SYS_NAND_OOBSIZE 64 81 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 82 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 83 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 84 10, 11, 12, 13} 85 #define CONFIG_SYS_NAND_ECCSIZE 512 86 #define CONFIG_SYS_NAND_ECCBYTES 3 87 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 88 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 89 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 90 91 /* 92 * High level configuration options 93 */ 94 #define CONFIG_OMAP /* This is TI OMAP core */ 95 #define CONFIG_OMAP_GPIO 96 #define CONFIG_OMAP_COMMON 97 /* Common ARM Erratas */ 98 #define CONFIG_ARM_ERRATA_454179 99 #define CONFIG_ARM_ERRATA_430973 100 #define CONFIG_ARM_ERRATA_621766 101 102 #define CONFIG_SDRC /* The chip has SDRC controller */ 103 104 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ 105 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ 106 107 /* 108 * Clock related definitions 109 */ 110 #define V_OSCK 26000000 /* Clock output from T2 */ 111 #define V_SCLK (V_OSCK >> 1) 112 113 /* 114 * OMAP3 has 12 GP timers, they can be driven by the system clock 115 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 116 * This rate is divided by a local divisor. 117 */ 118 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 119 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 120 121 /* Size of environment - 128KB */ 122 #define CONFIG_ENV_SIZE (128 << 10) 123 124 /* Size of malloc pool */ 125 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 126 127 /* 128 * Physical Memory Map 129 * Note 1: CS1 may or may not be populated 130 * Note 2: SDRAM size is expected to be at least 32MB 131 */ 132 #define CONFIG_NR_DRAM_BANKS 2 133 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 134 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 135 136 /* Limits for memtest */ 137 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 138 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 139 0x01F00000) /* 31MB */ 140 141 /* Default load address */ 142 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) 143 144 /* ----------------------------------------------------------------------------- 145 * Hardware drivers 146 * ----------------------------------------------------------------------------- 147 */ 148 149 /* 150 * NS16550 Configuration 151 */ 152 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 153 154 #define CONFIG_SYS_NS16550_SERIAL 155 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 156 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 157 158 /* 159 * select serial console configuration 160 */ 161 #define CONFIG_CONS_INDEX 1 162 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */ 163 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 164 #define CONFIG_BAUDRATE 115200 165 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 166 115200} 167 168 /* 169 * I2C 170 */ 171 #define CONFIG_SYS_I2C 172 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 173 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 174 #define CONFIG_SYS_I2C_OMAP34XX 175 176 /* 177 * PISMO support 178 */ 179 /* Monitor at start of flash - Reserve 2 sectors */ 180 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 181 182 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 183 184 /* Start location & size of environment */ 185 #define ONENAND_ENV_OFFSET 0x260000 186 #define SMNAND_ENV_OFFSET 0x260000 187 188 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 189 190 /* 191 * NAND 192 */ 193 /* Physical address to access NAND */ 194 #define CONFIG_SYS_NAND_ADDR NAND_BASE 195 196 /* Physical address to access NAND at CS0 */ 197 #define CONFIG_SYS_NAND_BASE NAND_BASE 198 199 /* Max number of NAND devices */ 200 #define CONFIG_SYS_MAX_NAND_DEVICE 1 201 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 202 /* Timeout values (in ticks) */ 203 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) 204 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) 205 206 /* Flash banks JFFS2 should use */ 207 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 208 CONFIG_SYS_MAX_NAND_DEVICE) 209 210 #define CONFIG_SYS_JFFS2_MEM_NAND 211 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 212 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 213 214 #define CONFIG_JFFS2_NAND 215 /* nand device jffs2 lives on */ 216 #define CONFIG_JFFS2_DEV "nand0" 217 /* Start of jffs2 partition */ 218 #define CONFIG_JFFS2_PART_OFFSET 0x680000 219 /* Size of jffs2 partition */ 220 #define CONFIG_JFFS2_PART_SIZE 0xf980000 221 222 /* 223 * USB 224 */ 225 #ifdef CONFIG_USB_OMAP3 226 227 #ifdef CONFIG_USB_MUSB_HCD 228 229 #define CONGIG_CMD_STORAGE 230 231 #ifdef CONFIG_USB_KEYBOARD 232 #define CONFIG_SYS_USB_EVENT_POLL 233 #define CONFIG_PREBOOT "usb start" 234 #endif /* CONFIG_USB_KEYBOARD */ 235 236 #endif /* CONFIG_USB_MUSB_HCD */ 237 238 #ifdef CONFIG_USB_MUSB_UDC 239 /* USB device configuration */ 240 #define CONFIG_USB_DEVICE 241 #define CONFIG_USB_TTY 242 243 /* Change these to suit your needs */ 244 #define CONFIG_USBD_VENDORID 0x0451 245 #define CONFIG_USBD_PRODUCTID 0x5678 246 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 247 #define CONFIG_USBD_PRODUCT_NAME "EVM" 248 #endif /* CONFIG_USB_MUSB_UDC */ 249 250 #endif /* CONFIG_USB_OMAP3 */ 251 252 /* ---------------------------------------------------------------------------- 253 * U-Boot features 254 * ---------------------------------------------------------------------------- 255 */ 256 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */ 257 258 #define CONFIG_MISC_INIT_R 259 260 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 261 #define CONFIG_SETUP_MEMORY_TAGS 262 #define CONFIG_INITRD_TAG 263 #define CONFIG_REVISION_TAG 264 265 /* Size of Console IO buffer */ 266 #define CONFIG_SYS_CBSIZE 512 267 268 /* Size of print buffer */ 269 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 270 sizeof(CONFIG_SYS_PROMPT) + 16) 271 272 /* Size of bootarg buffer */ 273 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 274 275 #define CONFIG_BOOTFILE "uImage" 276 277 /* 278 * NAND / OneNAND 279 */ 280 #if defined(CONFIG_CMD_NAND) 281 #define CONFIG_SYS_FLASH_BASE NAND_BASE 282 283 #define CONFIG_NAND_OMAP_GPMC 284 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 285 #elif defined(CONFIG_CMD_ONENAND) 286 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP 287 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 288 #endif 289 290 #if !defined(CONFIG_ENV_IS_NOWHERE) 291 #if defined(CONFIG_CMD_NAND) 292 #define CONFIG_ENV_IS_IN_NAND 293 #elif defined(CONFIG_CMD_ONENAND) 294 #define CONFIG_ENV_IS_IN_ONENAND 295 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET 296 #endif 297 #endif /* CONFIG_ENV_IS_NOWHERE */ 298 299 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 300 301 #if defined(CONFIG_CMD_NET) 302 303 /* Ethernet (SMSC9115 from SMSC9118 family) */ 304 #define CONFIG_SMC911X 305 #define CONFIG_SMC911X_32_BIT 306 #define CONFIG_SMC911X_BASE 0x2C000000 307 308 /* BOOTP fields */ 309 #define CONFIG_BOOTP_SUBNETMASK 0x00000001 310 #define CONFIG_BOOTP_GATEWAY 0x00000002 311 #define CONFIG_BOOTP_HOSTNAME 0x00000004 312 #define CONFIG_BOOTP_BOOTPATH 0x00000010 313 314 #endif /* CONFIG_CMD_NET */ 315 316 /* Support for relocation */ 317 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 318 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 319 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 320 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 321 CONFIG_SYS_INIT_RAM_SIZE - \ 322 GENERATED_GBL_DATA_SIZE) 323 324 /* ----------------------------------------------------------------------------- 325 * Board specific 326 * ----------------------------------------------------------------------------- 327 */ 328 #define CONFIG_SYS_NO_FLASH 329 330 /* Uncomment to define the board revision statically */ 331 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */ 332 333 /* Defines for SPL */ 334 #define CONFIG_SPL_FRAMEWORK 335 #define CONFIG_SPL_TEXT_BASE 0x40200800 336 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 337 CONFIG_SPL_TEXT_BASE) 338 339 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 340 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 341 342 #define CONFIG_SPL_BOARD_INIT 343 #define CONFIG_SPL_OMAP3_ID_NAND 344 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 345 346 /* 347 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 348 * 64 bytes before this address should be set aside for u-boot.img's 349 * header. That is 0x800FFFC0--0x80100000 should not be used for any 350 * other needs. 351 */ 352 #define CONFIG_SYS_TEXT_BASE 0x80100000 353 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 354 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 355 356 /* ----------------------------------------------------------------------------- 357 * Default environment 358 * ----------------------------------------------------------------------------- 359 */ 360 361 #define CONFIG_EXTRA_ENV_SETTINGS \ 362 "loadaddr=0x82000000\0" \ 363 "usbtty=cdc_acm\0" \ 364 "mmcdev=0\0" \ 365 "console=ttyO0,115200n8\0" \ 366 "mmcargs=setenv bootargs console=${console} " \ 367 "root=/dev/mmcblk0p2 rw " \ 368 "rootfstype=ext3 rootwait\0" \ 369 "nandargs=setenv bootargs console=${console} " \ 370 "root=/dev/mtdblock4 rw " \ 371 "rootfstype=jffs2\0" \ 372 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 373 "bootscript=echo Running bootscript from mmc ...; " \ 374 "source ${loadaddr}\0" \ 375 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 376 "mmcboot=echo Booting from mmc ...; " \ 377 "run mmcargs; " \ 378 "bootm ${loadaddr}\0" \ 379 "nandboot=echo Booting from nand ...; " \ 380 "run nandargs; " \ 381 "onenand read ${loadaddr} 280000 400000; " \ 382 "bootm ${loadaddr}\0" \ 383 384 #define CONFIG_BOOTCOMMAND \ 385 "mmc dev ${mmcdev}; if mmc rescan; then " \ 386 "if run loadbootscript; then " \ 387 "run bootscript; " \ 388 "else " \ 389 "if run loaduimage; then " \ 390 "run mmcboot; " \ 391 "else run nandboot; " \ 392 "fi; " \ 393 "fi; " \ 394 "else run nandboot; fi" 395 396 #endif /* __OMAP3EVM_CONFIG_H */ 397