xref: /rk3399_rockchip-uboot/include/configs/omap3_beagle.h (revision 933d370121e5e303b0e3335655b2e2bec6b1c16e)
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * Configuration settings for the TI OMAP3530 Beagle board.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27 
28 #ifndef __CONFIG_H
29 #define __CONFIG_H
30 
31 /*
32  * High Level Configuration Options
33  */
34 #define CONFIG_OMAP		1	/* in a TI OMAP core */
35 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
36 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
37 #define CONFIG_OMAP3_BEAGLE	1	/* working with BEAGLE */
38 
39 #define CONFIG_SDRC	/* The chip has SDRC controller */
40 
41 #include <asm/arch/cpu.h>		/* get chip and board defs */
42 #include <asm/arch/omap3.h>
43 
44 /*
45  * Display CPU and Board information
46  */
47 #define CONFIG_DISPLAY_CPUINFO		1
48 #define CONFIG_DISPLAY_BOARDINFO	1
49 
50 /* Clock Defines */
51 #define V_OSCK			26000000	/* Clock output from T2 */
52 #define V_SCLK			(V_OSCK >> 1)
53 
54 #undef CONFIG_USE_IRQ				/* no support for IRQs */
55 #define CONFIG_MISC_INIT_R
56 
57 #define CONFIG_OF_LIBFDT		1
58 
59 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
60 #define CONFIG_SETUP_MEMORY_TAGS	1
61 #define CONFIG_INITRD_TAG		1
62 #define CONFIG_REVISION_TAG		1
63 
64 /*
65  * Size of malloc() pool
66  */
67 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
68 						/* Sector */
69 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
70 
71 /*
72  * Hardware drivers
73  */
74 
75 /*
76  * NS16550 Configuration
77  */
78 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
79 
80 #define CONFIG_SYS_NS16550
81 #define CONFIG_SYS_NS16550_SERIAL
82 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
83 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
84 
85 /*
86  * select serial console configuration
87  */
88 #define CONFIG_CONS_INDEX		3
89 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
90 #define CONFIG_SERIAL3			3	/* UART3 on Beagle Rev 2 */
91 
92 /* allow to overwrite serial and ethaddr */
93 #define CONFIG_ENV_OVERWRITE
94 #define CONFIG_BAUDRATE			115200
95 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
96 					115200}
97 #define CONFIG_GENERIC_MMC		1
98 #define CONFIG_MMC			1
99 #define CONFIG_OMAP_HSMMC		1
100 #define CONFIG_DOS_PARTITION		1
101 
102 /* Status LED */
103 #define CONFIG_STATUS_LED		1
104 #define CONFIG_BOARD_SPECIFIC_LED	1
105 #define STATUS_LED_BIT			0x01
106 #define STATUS_LED_STATE		STATUS_LED_ON
107 #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
108 #define STATUS_LED_BIT1			0x02
109 #define STATUS_LED_STATE1		STATUS_LED_ON
110 #define STATUS_LED_PERIOD1		(CONFIG_SYS_HZ / 2)
111 #define STATUS_LED_BOOT			STATUS_LED_BIT
112 #define STATUS_LED_GREEN		STATUS_LED_BIT1
113 
114 /* DDR - I use Micron DDR */
115 #define CONFIG_OMAP3_MICRON_DDR		1
116 
117 /* USB */
118 #define CONFIG_MUSB_UDC			1
119 #define CONFIG_USB_OMAP3		1
120 #define CONFIG_TWL4030_USB		1
121 
122 /* USB device configuration */
123 #define CONFIG_USB_DEVICE		1
124 #define CONFIG_USB_TTY			1
125 #define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
126 
127 /* USB EHCI */
128 #define CONFIG_CMD_USB
129 #define CONFIG_USB_EHCI
130 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
131 #define CONFIG_USB_HOST_ETHER
132 #define CONFIG_USB_ETHER_SMSC95XX
133 #define CONFIG_USB_ETHER_ASIX
134 
135 #define CONFIG_NET_MULTI
136 
137 /* commands to include */
138 #include <config_cmd_default.h>
139 
140 #define CONFIG_CMD_CACHE
141 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
142 #define CONFIG_CMD_FAT		/* FAT support			*/
143 #define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
144 #define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
145 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
146 #define MTDIDS_DEFAULT			"nand0=nand"
147 #define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
148 					"1920k(u-boot),128k(u-boot-env),"\
149 					"4m(kernel),-(fs)"
150 
151 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
152 #define CONFIG_CMD_MMC		/* MMC support			*/
153 #define CONFIG_USB_STORAGE	/* USB storage support		*/
154 #define CONFIG_CMD_NAND		/* NAND support			*/
155 #define CONFIG_CMD_LED		/* LED support			*/
156 #define CONFIG_CMD_NET      /* bootp, tftpboot, rarpboot    */
157 #define CONFIG_CMD_NFS      /* NFS support          */
158 #define CONFIG_CMD_PING
159 #define CONFIG_CMD_DHCP
160 #define CONFIG_CMD_SETEXPR	/* Evaluate expressions		*/
161 
162 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
163 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
164 #undef CONFIG_CMD_IMI		/* iminfo			*/
165 #undef CONFIG_CMD_IMLS		/* List all found images	*/
166 
167 #define CONFIG_SYS_NO_FLASH
168 #define CONFIG_HARD_I2C			1
169 #define CONFIG_SYS_I2C_SPEED		100000
170 #define CONFIG_SYS_I2C_SLAVE		1
171 #define CONFIG_SYS_I2C_BUS		0
172 #define CONFIG_SYS_I2C_BUS_SELECT	1
173 #define CONFIG_I2C_MULTI_BUS		1
174 #define CONFIG_DRIVER_OMAP34XX_I2C	1
175 #define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
176 
177 /*
178  * TWL4030
179  */
180 #define CONFIG_TWL4030_POWER		1
181 #define CONFIG_TWL4030_LED		1
182 
183 /*
184  * Board NAND Info.
185  */
186 #define CONFIG_SYS_NAND_QUIET_TEST	1
187 #define CONFIG_NAND_OMAP_GPMC
188 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
189 							/* to access nand */
190 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
191 							/* to access nand at */
192 							/* CS0 */
193 #define GPMC_NAND_ECC_LP_x16_LAYOUT	1
194 
195 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
196 							/* devices */
197 #define CONFIG_JFFS2_NAND
198 /* nand device jffs2 lives on */
199 #define CONFIG_JFFS2_DEV		"nand0"
200 /* start of jffs2 partition */
201 #define CONFIG_JFFS2_PART_OFFSET	0x680000
202 #define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
203 							/* partition */
204 
205 /* Environment information */
206 #define CONFIG_BOOTDELAY		2
207 
208 #define CONFIG_EXTRA_ENV_SETTINGS \
209 	"loadaddr=0x82000000\0" \
210 	"usbtty=cdc_acm\0" \
211 	"usbethaddr=de:ad:be:ef\0" \
212 	"bootfile=uImage.beagle\0" \
213 	"console=ttyS2,115200n8\0" \
214 	"mpurate=auto\0" \
215 	"buddy=none "\
216 	"vram=12M\0" \
217 	"dvimode=1024x768MR-16@60\0" \
218 	"defaultdisplay=dvi\0" \
219 	"mmcdev=0\0" \
220 	"mmcroot=/dev/mmcblk0p2 rw\0" \
221 	"mmcrootfstype=ext3 rootwait\0" \
222 	"nandroot=/dev/mtdblock4 rw\0" \
223 	"nandrootfstype=jffs2\0" \
224 	"mmcargs=setenv bootargs console=${console} " \
225 		"mpurate=${mpurate} " \
226 		"buddy=${buddy} "\
227 		"vram=${vram} " \
228 		"omapfb.mode=dvi:${dvimode} " \
229 		"omapdss.def_disp=${defaultdisplay} " \
230 		"root=${mmcroot} " \
231 		"rootfstype=${mmcrootfstype}\0" \
232 	"nandargs=setenv bootargs console=${console} " \
233 		"mpurate=${mpurate} " \
234 		"buddy=${buddy} "\
235 		"vram=${vram} " \
236 		"omapfb.mode=dvi:${dvimode} " \
237 		"omapdss.def_disp=${defaultdisplay} " \
238 		"root=${nandroot} " \
239 		"rootfstype=${nandrootfstype}\0" \
240 	"bootenv=uEnv.txt\0" \
241 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
242 	"importbootenv=echo Importing environment from mmc ...; " \
243 		"env import -t $loadaddr $filesize\0" \
244 	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
245 	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \
246 	"mmcboot=echo Booting from mmc ...; " \
247 		"run mmcargs; " \
248 		"bootm ${loadaddr}\0" \
249 	"nandboot=echo Booting from nand ...; " \
250 		"run nandargs; " \
251 		"nand read ${loadaddr} 280000 400000; " \
252 		"bootm ${loadaddr}\0" \
253 
254 #define CONFIG_BOOTCOMMAND \
255 	"if mmc rescan ${mmcdev}; then " \
256 		"if userbutton; then " \
257 			"setenv bootenv user.txt;" \
258 		"fi;" \
259 		"echo SD/MMC found on device ${mmcdev};" \
260 		"if run loadbootenv; then " \
261 			"echo Loaded environment from ${bootenv};" \
262 			"run importbootenv;" \
263 		"fi;" \
264 		"if test -n $uenvcmd; then " \
265 			"echo Running uenvcmd ...;" \
266 			"run uenvcmd;" \
267 		"fi;" \
268 		"if run loaduimage; then " \
269 			"run mmcboot;" \
270 		"fi;" \
271 	"fi;" \
272 	"run nandboot;" \
273 
274 #define CONFIG_AUTO_COMPLETE		1
275 /*
276  * Miscellaneous configurable options
277  */
278 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
279 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
280 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
281 #define CONFIG_SYS_PROMPT		"OMAP3 beagleboard.org # "
282 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
283 /* Print Buffer Size */
284 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
285 					sizeof(CONFIG_SYS_PROMPT) + 16)
286 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
287 /* Boot Argument Buffer Size */
288 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
289 
290 #define CONFIG_SYS_ALT_MEMTEST		1
291 #define CONFIG_SYS_MEMTEST_START	(0x82000000)		/* memtest */
292 								/* defaults */
293 #define CONFIG_SYS_MEMTEST_END		(0x87FFFFFF) 		/* 128MB */
294 #define CONFIG_SYS_MEMTEST_SCRATCH	(0x81000000)	/* dummy address */
295 
296 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)	/* default */
297 							/* load address */
298 
299 /*
300  * OMAP3 has 12 GP timers, they can be driven by the system clock
301  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
302  * This rate is divided by a local divisor.
303  */
304 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
305 #define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
306 #define CONFIG_SYS_HZ			1000
307 
308 /*-----------------------------------------------------------------------
309  * Stack sizes
310  *
311  * The stack sizes are set up in start.S using the settings below
312  */
313 #define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
314 #ifdef CONFIG_USE_IRQ
315 #define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack 4 KiB */
316 #define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack 4 KiB */
317 #endif
318 
319 /*-----------------------------------------------------------------------
320  * Physical Memory Map
321  */
322 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
323 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
324 #define PHYS_SDRAM_1_SIZE	(32 << 20)	/* at least 32 MiB */
325 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
326 
327 /* SDRAM Bank Allocation method */
328 #define SDRC_R_B_C		1
329 
330 /*-----------------------------------------------------------------------
331  * FLASH and environment organization
332  */
333 
334 /* **** PISMO SUPPORT *** */
335 
336 /* Configure the PISMO */
337 #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
338 #define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
339 
340 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
341 
342 #if defined(CONFIG_CMD_NAND)
343 #define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
344 #endif
345 
346 /* Monitor at start of flash */
347 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
348 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
349 
350 #define CONFIG_ENV_IS_IN_NAND		1
351 #define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
352 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
353 
354 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
355 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
356 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
357 
358 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
359 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
360 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
361 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
362 					 CONFIG_SYS_INIT_RAM_SIZE - \
363 					 GENERATED_GBL_DATA_SIZE)
364 
365 #define CONFIG_OMAP3_SPI
366 
367 #endif /* __CONFIG_H */
368