1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 16 17 /* 18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 19 * 64 bytes before this address should be set aside for u-boot.img's 20 * header. That is 0x800FFFC0--0x80100000 should not be used for any 21 * other needs. We use this rather than the inherited defines from 22 * ti_armv7_common.h for backwards compatibility. 23 */ 24 #define CONFIG_SYS_TEXT_BASE 0x80100000 25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ 27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 29 30 #include <configs/ti_omap3_common.h> 31 32 #define CONFIG_MISC_INIT_R 33 34 #define CONFIG_REVISION_TAG 1 35 #define CONFIG_ENV_OVERWRITE 36 37 /* Status LED */ 38 39 /* Enable Multi Bus support for I2C */ 40 #define CONFIG_I2C_MULTI_BUS 1 41 42 /* Probe all devices */ 43 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 44 45 /* USB */ 46 #define CONFIG_USB_MUSB_OMAP2PLUS 47 #define CONFIG_USB_MUSB_PIO_ONLY 48 #define CONFIG_TWL4030_USB 1 49 #define CONFIG_USB_ETHER 50 51 /* USB EHCI */ 52 53 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 54 55 #define CONFIG_USB_HOST_ETHER 56 #define CONFIG_USB_ETHER_ASIX 57 #define CONFIG_USB_ETHER_MCS7830 58 #define CONFIG_USB_ETHER_SMSC95XX 59 60 /* commands to include */ 61 62 #define MTDIDS_DEFAULT "nand0=nand" 63 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 64 "1920k(u-boot),128k(u-boot-env),"\ 65 "4m(kernel),-(fs)" 66 67 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 68 69 /* 70 * TWL4030 71 */ 72 #define CONFIG_TWL4030_LED 1 73 74 /* 75 * Board NAND Info. 76 */ 77 #define CONFIG_NAND_OMAP_GPMC 78 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 79 /* devices */ 80 81 #define BOOT_TARGET_DEVICES(func) \ 82 func(MMC, mmc, 0) 83 84 #define CONFIG_BOOTCOMMAND \ 85 "run findfdt; " \ 86 "run distro_bootcmd; " \ 87 "mmc dev ${mmcdev}; if mmc rescan; then " \ 88 "if run userbutton; then " \ 89 "setenv bootenv uEnv.txt;" \ 90 "else " \ 91 "setenv bootenv user.txt;" \ 92 "fi;" \ 93 "echo SD/MMC found on device ${mmcdev};" \ 94 "if run loadbootenv; then " \ 95 "echo Loaded environment from ${bootenv};" \ 96 "run importbootenv;" \ 97 "fi;" \ 98 "if test -n $uenvcmd; then " \ 99 "echo Running uenvcmd ...;" \ 100 "run uenvcmd;" \ 101 "fi;" \ 102 "if run loadbootscript; then " \ 103 "run bootscript; " \ 104 "else " \ 105 "if run loadimage; then " \ 106 "run mmcboot;" \ 107 "fi;" \ 108 "fi; " \ 109 "fi;" \ 110 "run nandboot;" \ 111 "setenv bootfile zImage;" \ 112 "if run loadimage; then " \ 113 "run loadfdt;" \ 114 "run mmcbootz; " \ 115 "fi; " \ 116 117 #include <config_distro_bootcmd.h> 118 119 #define CONFIG_EXTRA_ENV_SETTINGS \ 120 "loadaddr=0x80200000\0" \ 121 "kernel_addr_r=0x80200000\0" \ 122 "rdaddr=0x81000000\0" \ 123 "initrd_addr_r=0x81000000\0" \ 124 "fdt_high=0xffffffff\0" \ 125 "fdtaddr=0x80f80000\0" \ 126 "fdt_addr_r=0x80f80000\0" \ 127 "usbtty=cdc_acm\0" \ 128 "bootfile=uImage\0" \ 129 "ramdisk=ramdisk.gz\0" \ 130 "bootdir=/boot\0" \ 131 "bootpart=0:2\0" \ 132 "console=ttyO2,115200n8\0" \ 133 "mpurate=auto\0" \ 134 "buddy=none\0" \ 135 "optargs=\0" \ 136 "camera=none\0" \ 137 "vram=12M\0" \ 138 "dvimode=640x480MR-16@60\0" \ 139 "defaultdisplay=dvi\0" \ 140 "mmcdev=0\0" \ 141 "mmcroot=/dev/mmcblk0p2 rw\0" \ 142 "mmcrootfstype=ext3 rootwait\0" \ 143 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 144 "nandrootfstype=ubifs\0" \ 145 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 146 "ramrootfstype=ext2\0" \ 147 "mmcargs=setenv bootargs console=${console} " \ 148 "${optargs} " \ 149 "mpurate=${mpurate} " \ 150 "buddy=${buddy} "\ 151 "camera=${camera} "\ 152 "vram=${vram} " \ 153 "omapfb.mode=dvi:${dvimode} " \ 154 "omapdss.def_disp=${defaultdisplay} " \ 155 "root=${mmcroot} " \ 156 "rootfstype=${mmcrootfstype}\0" \ 157 "nandargs=setenv bootargs console=${console} " \ 158 "${optargs} " \ 159 "mpurate=${mpurate} " \ 160 "buddy=${buddy} "\ 161 "camera=${camera} "\ 162 "vram=${vram} " \ 163 "omapfb.mode=dvi:${dvimode} " \ 164 "omapdss.def_disp=${defaultdisplay} " \ 165 "root=${nandroot} " \ 166 "rootfstype=${nandrootfstype}\0" \ 167 "findfdt=" \ 168 "if test $beaglerev = AxBx; then " \ 169 "setenv fdtfile omap3-beagle.dtb; fi; " \ 170 "if test $beaglerev = Cx; then " \ 171 "setenv fdtfile omap3-beagle.dtb; fi; " \ 172 "if test $beaglerev = C4; then " \ 173 "setenv fdtfile omap3-beagle.dtb; fi; " \ 174 "if test $beaglerev = xMAB; then " \ 175 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \ 176 "if test $beaglerev = xMC; then " \ 177 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ 178 "if test $fdtfile = undefined; then " \ 179 "echo WARNING: Could not determine device tree to use; fi; \0" \ 180 "validatefdt=" \ 181 "if test $beaglerev = xMAB; then " \ 182 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \ 183 "setenv fdtfile omap3-beagle-xm.dtb; " \ 184 "fi; " \ 185 "fi; \0" \ 186 "bootenv=uEnv.txt\0" \ 187 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 188 "importbootenv=echo Importing environment from mmc ...; " \ 189 "env import -t -r $loadaddr $filesize\0" \ 190 "ramargs=setenv bootargs console=${console} " \ 191 "${optargs} " \ 192 "mpurate=${mpurate} " \ 193 "buddy=${buddy} "\ 194 "vram=${vram} " \ 195 "omapfb.mode=dvi:${dvimode} " \ 196 "omapdss.def_disp=${defaultdisplay} " \ 197 "root=${ramroot} " \ 198 "rootfstype=${ramrootfstype}\0" \ 199 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ 200 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 201 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 202 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 203 "source ${loadaddr}\0" \ 204 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 205 "mmcboot=echo Booting from mmc ...; " \ 206 "run mmcargs; " \ 207 "bootm ${loadaddr}\0" \ 208 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ 209 "run mmcargs; " \ 210 "bootz ${loadaddr} - ${fdtaddr}\0" \ 211 "nandboot=echo Booting from nand ...; " \ 212 "run nandargs; " \ 213 "nand read ${loadaddr} 280000 400000; " \ 214 "bootm ${loadaddr}\0" \ 215 "ramboot=echo Booting from ramdisk ...; " \ 216 "run ramargs; " \ 217 "bootm ${loadaddr}\0" \ 218 "userbutton=if gpio input 173; then run userbutton_xm; " \ 219 "else run userbutton_nonxm; fi;\0" \ 220 "userbutton_xm=gpio input 4;\0" \ 221 "userbutton_nonxm=gpio input 7;\0" \ 222 BOOTENV 223 224 /* 225 * OMAP3 has 12 GP timers, they can be driven by the system clock 226 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 227 * This rate is divided by a local divisor. 228 */ 229 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 230 231 /*----------------------------------------------------------------------- 232 * FLASH and environment organization 233 */ 234 235 /* **** PISMO SUPPORT *** */ 236 #if defined(CONFIG_CMD_NAND) 237 #define CONFIG_SYS_FLASH_BASE NAND_BASE 238 #endif 239 240 /* Monitor at start of flash */ 241 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 242 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 243 244 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 245 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 246 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 247 248 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 249 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 250 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 251 252 /* Defines for SPL */ 253 254 /* NAND boot config */ 255 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 256 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 257 #define CONFIG_SYS_NAND_PAGE_COUNT 64 258 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 259 #define CONFIG_SYS_NAND_OOBSIZE 64 260 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 261 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 262 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 263 10, 11, 12, 13} 264 #define CONFIG_SYS_NAND_ECCSIZE 512 265 #define CONFIG_SYS_NAND_ECCBYTES 3 266 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 267 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 268 /* NAND: SPL falcon mode configs */ 269 #ifdef CONFIG_SPL_OS_BOOT 270 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 271 #endif 272 273 #endif /* __CONFIG_H */ 274