1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 16 17 /* 18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 19 * 64 bytes before this address should be set aside for u-boot.img's 20 * header. That is 0x800FFFC0--0x80100000 should not be used for any 21 * other needs. We use this rather than the inherited defines from 22 * ti_armv7_common.h for backwards compatibility. 23 */ 24 #define CONFIG_SYS_TEXT_BASE 0x80100000 25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ 27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 29 30 #include <configs/ti_omap3_common.h> 31 32 #define CONFIG_MISC_INIT_R 33 34 #define CONFIG_REVISION_TAG 1 35 #define CONFIG_ENV_OVERWRITE 36 /* NAND: SPL falcon mode configs */ 37 #if defined(CONFIG_SPL_OS_BOOT) 38 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 39 #endif /* CONFIG_SPL_OS_BOOT */ 40 #endif /* CONFIG_NAND */ 41 42 /* Status LED */ 43 44 /* Enable Multi Bus support for I2C */ 45 #define CONFIG_I2C_MULTI_BUS 1 46 47 /* Probe all devices */ 48 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 49 50 /* USB */ 51 #define CONFIG_USB_MUSB_OMAP2PLUS 52 #define CONFIG_USB_MUSB_PIO_ONLY 53 #define CONFIG_TWL4030_USB 1 54 #define CONFIG_USB_ETHER 55 56 /* USB EHCI */ 57 58 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 59 60 /* commands to include */ 61 62 #define MTDIDS_DEFAULT "nand0=nand" 63 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 64 "1920k(u-boot),128k(u-boot-env),"\ 65 "4m(kernel),-(fs)" 66 67 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 68 69 /* 70 * TWL4030 71 */ 72 #define CONFIG_TWL4030_LED 1 73 74 /* 75 * Board NAND Info. 76 */ 77 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 78 /* devices */ 79 80 #define BOOT_TARGET_DEVICES(func) \ 81 func(MMC, mmc, 0) 82 83 #define CONFIG_BOOTCOMMAND \ 84 "run findfdt; " \ 85 "run distro_bootcmd; " \ 86 "mmc dev ${mmcdev}; if mmc rescan; then " \ 87 "if run userbutton; then " \ 88 "setenv bootenv uEnv.txt;" \ 89 "else " \ 90 "setenv bootenv user.txt;" \ 91 "fi;" \ 92 "echo SD/MMC found on device ${mmcdev};" \ 93 "if run loadbootenv; then " \ 94 "echo Loaded environment from ${bootenv};" \ 95 "run importbootenv;" \ 96 "fi;" \ 97 "if test -n $uenvcmd; then " \ 98 "echo Running uenvcmd ...;" \ 99 "run uenvcmd;" \ 100 "fi;" \ 101 "if run loadbootscript; then " \ 102 "run bootscript; " \ 103 "else " \ 104 "if run loadimage; then " \ 105 "run mmcboot;" \ 106 "fi;" \ 107 "fi; " \ 108 "fi;" \ 109 "run nandboot;" \ 110 "setenv bootfile zImage;" \ 111 "if run loadimage; then " \ 112 "run loadfdt;" \ 113 "run mmcbootz; " \ 114 "fi; " \ 115 116 #include <config_distro_bootcmd.h> 117 118 #define CONFIG_EXTRA_ENV_SETTINGS \ 119 "loadaddr=0x80200000\0" \ 120 "kernel_addr_r=0x80200000\0" \ 121 "rdaddr=0x81000000\0" \ 122 "initrd_addr_r=0x81000000\0" \ 123 "fdt_high=0xffffffff\0" \ 124 "fdtaddr=0x80f80000\0" \ 125 "fdt_addr_r=0x80f80000\0" \ 126 "usbtty=cdc_acm\0" \ 127 "bootfile=uImage\0" \ 128 "ramdisk=ramdisk.gz\0" \ 129 "bootdir=/boot\0" \ 130 "bootpart=0:2\0" \ 131 "console=ttyO2,115200n8\0" \ 132 "mpurate=auto\0" \ 133 "buddy=none\0" \ 134 "optargs=\0" \ 135 "camera=none\0" \ 136 "vram=12M\0" \ 137 "dvimode=640x480MR-16@60\0" \ 138 "defaultdisplay=dvi\0" \ 139 "mmcdev=0\0" \ 140 "mmcroot=/dev/mmcblk0p2 rw\0" \ 141 "mmcrootfstype=ext3 rootwait\0" \ 142 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 143 "nandrootfstype=ubifs\0" \ 144 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 145 "ramrootfstype=ext2\0" \ 146 "mmcargs=setenv bootargs console=${console} " \ 147 "${optargs} " \ 148 "mpurate=${mpurate} " \ 149 "buddy=${buddy} "\ 150 "camera=${camera} "\ 151 "vram=${vram} " \ 152 "omapfb.mode=dvi:${dvimode} " \ 153 "omapdss.def_disp=${defaultdisplay} " \ 154 "root=${mmcroot} " \ 155 "rootfstype=${mmcrootfstype}\0" \ 156 "nandargs=setenv bootargs console=${console} " \ 157 "${optargs} " \ 158 "mpurate=${mpurate} " \ 159 "buddy=${buddy} "\ 160 "camera=${camera} "\ 161 "vram=${vram} " \ 162 "omapfb.mode=dvi:${dvimode} " \ 163 "omapdss.def_disp=${defaultdisplay} " \ 164 "root=${nandroot} " \ 165 "rootfstype=${nandrootfstype}\0" \ 166 "findfdt=" \ 167 "if test $beaglerev = AxBx; then " \ 168 "setenv fdtfile omap3-beagle.dtb; fi; " \ 169 "if test $beaglerev = Cx; then " \ 170 "setenv fdtfile omap3-beagle.dtb; fi; " \ 171 "if test $beaglerev = C4; then " \ 172 "setenv fdtfile omap3-beagle.dtb; fi; " \ 173 "if test $beaglerev = xMAB; then " \ 174 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \ 175 "if test $beaglerev = xMC; then " \ 176 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ 177 "if test $fdtfile = undefined; then " \ 178 "echo WARNING: Could not determine device tree to use; fi; \0" \ 179 "validatefdt=" \ 180 "if test $beaglerev = xMAB; then " \ 181 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \ 182 "setenv fdtfile omap3-beagle-xm.dtb; " \ 183 "fi; " \ 184 "fi; \0" \ 185 "bootenv=uEnv.txt\0" \ 186 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 187 "importbootenv=echo Importing environment from mmc ...; " \ 188 "env import -t -r $loadaddr $filesize\0" \ 189 "ramargs=setenv bootargs console=${console} " \ 190 "${optargs} " \ 191 "mpurate=${mpurate} " \ 192 "buddy=${buddy} "\ 193 "vram=${vram} " \ 194 "omapfb.mode=dvi:${dvimode} " \ 195 "omapdss.def_disp=${defaultdisplay} " \ 196 "root=${ramroot} " \ 197 "rootfstype=${ramrootfstype}\0" \ 198 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ 199 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 200 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 201 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 202 "source ${loadaddr}\0" \ 203 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 204 "mmcboot=echo Booting from mmc ...; " \ 205 "run mmcargs; " \ 206 "bootm ${loadaddr}\0" \ 207 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ 208 "run mmcargs; " \ 209 "bootz ${loadaddr} - ${fdtaddr}\0" \ 210 "nandboot=echo Booting from nand ...; " \ 211 "run nandargs; " \ 212 "nand read ${loadaddr} 280000 400000; " \ 213 "bootm ${loadaddr}\0" \ 214 "ramboot=echo Booting from ramdisk ...; " \ 215 "run ramargs; " \ 216 "bootm ${loadaddr}\0" \ 217 "userbutton=if gpio input 173; then run userbutton_xm; " \ 218 "else run userbutton_nonxm; fi;\0" \ 219 "userbutton_xm=gpio input 4;\0" \ 220 "userbutton_nonxm=gpio input 7;\0" \ 221 BOOTENV 222 223 /* 224 * OMAP3 has 12 GP timers, they can be driven by the system clock 225 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 226 * This rate is divided by a local divisor. 227 */ 228 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 229 230 /*----------------------------------------------------------------------- 231 * FLASH and environment organization 232 */ 233 234 /* **** PISMO SUPPORT *** */ 235 #if defined(CONFIG_CMD_NAND) 236 #define CONFIG_SYS_FLASH_BASE NAND_BASE 237 #endif 238 239 /* Monitor at start of flash */ 240 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 241 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 242 243 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 244 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 245 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 246 247 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 248 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 249 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 250 251 /* Defines for SPL */ 252 253 /* NAND boot config */ 254 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 255 #define CONFIG_SYS_NAND_PAGE_COUNT 64 256 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 257 #define CONFIG_SYS_NAND_OOBSIZE 64 258 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 259 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 260 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 261 10, 11, 12, 13} 262 #define CONFIG_SYS_NAND_ECCSIZE 512 263 #define CONFIG_SYS_NAND_ECCBYTES 3 264 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 265 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 266 /* NAND: SPL falcon mode configs */ 267 #ifdef CONFIG_SPL_OS_BOOT 268 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 269 #endif 270 271 #endif /* __CONFIG_H */ 272