1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * Configuration settings for the TI OMAP3530 Beagle board. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 16 17 /* 18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 19 * 64 bytes before this address should be set aside for u-boot.img's 20 * header. That is 0x800FFFC0--0x80100000 should not be used for any 21 * other needs. We use this rather than the inherited defines from 22 * ti_armv7_common.h for backwards compatibility. 23 */ 24 #define CONFIG_SYS_TEXT_BASE 0x80100000 25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ 27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 29 30 #include <configs/ti_omap3_common.h> 31 32 #define CONFIG_MISC_INIT_R 33 34 #define CONFIG_REVISION_TAG 1 35 #define CONFIG_ENV_OVERWRITE 36 37 /* Status LED */ 38 39 /* Enable Multi Bus support for I2C */ 40 #define CONFIG_I2C_MULTI_BUS 1 41 42 /* Probe all devices */ 43 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 44 45 /* USB */ 46 #define CONFIG_USB_MUSB_OMAP2PLUS 47 #define CONFIG_USB_MUSB_PIO_ONLY 48 #define CONFIG_TWL4030_USB 1 49 #define CONFIG_USB_ETHER 50 #define CONFIG_USB_ETHER_RNDIS 51 #define CONFIG_USB_FUNCTION_FASTBOOT 52 #define CONFIG_CMD_FASTBOOT 53 #define CONFIG_ANDROID_BOOT_IMAGE 54 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 55 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 56 57 /* USB EHCI */ 58 59 #define CONFIG_USB_EHCI_OMAP 60 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 61 62 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 63 #define CONFIG_USB_HOST_ETHER 64 #define CONFIG_USB_ETHER_ASIX 65 #define CONFIG_USB_ETHER_MCS7830 66 #define CONFIG_USB_ETHER_SMSC95XX 67 68 /* commands to include */ 69 70 #define MTDIDS_DEFAULT "nand0=nand" 71 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 72 "1920k(u-boot),128k(u-boot-env),"\ 73 "4m(kernel),-(fs)" 74 75 #define CONFIG_CMD_NAND /* NAND support */ 76 77 #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 78 79 /* 80 * TWL4030 81 */ 82 #define CONFIG_TWL4030_LED 1 83 84 /* 85 * Board NAND Info. 86 */ 87 #define CONFIG_NAND_OMAP_GPMC 88 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 89 /* devices */ 90 91 #define BOOT_TARGET_DEVICES(func) \ 92 func(MMC, mmc, 0) 93 94 #define CONFIG_BOOTCOMMAND \ 95 "run findfdt; " \ 96 "run distro_bootcmd; " \ 97 "mmc dev ${mmcdev}; if mmc rescan; then " \ 98 "if run userbutton; then " \ 99 "setenv bootenv uEnv.txt;" \ 100 "else " \ 101 "setenv bootenv user.txt;" \ 102 "fi;" \ 103 "echo SD/MMC found on device ${mmcdev};" \ 104 "if run loadbootenv; then " \ 105 "echo Loaded environment from ${bootenv};" \ 106 "run importbootenv;" \ 107 "fi;" \ 108 "if test -n $uenvcmd; then " \ 109 "echo Running uenvcmd ...;" \ 110 "run uenvcmd;" \ 111 "fi;" \ 112 "if run loadbootscript; then " \ 113 "run bootscript; " \ 114 "else " \ 115 "if run loadimage; then " \ 116 "run mmcboot;" \ 117 "fi;" \ 118 "fi; " \ 119 "fi;" \ 120 "run nandboot;" \ 121 "setenv bootfile zImage;" \ 122 "if run loadimage; then " \ 123 "run loadfdt;" \ 124 "run mmcbootz; " \ 125 "fi; " \ 126 127 #include <config_distro_bootcmd.h> 128 129 #define CONFIG_EXTRA_ENV_SETTINGS \ 130 "loadaddr=0x80200000\0" \ 131 "kernel_addr_r=0x80200000\0" \ 132 "rdaddr=0x81000000\0" \ 133 "initrd_addr_r=0x81000000\0" \ 134 "fdt_high=0xffffffff\0" \ 135 "fdtaddr=0x80f80000\0" \ 136 "fdt_addr_r=0x80f80000\0" \ 137 "usbtty=cdc_acm\0" \ 138 "bootfile=uImage\0" \ 139 "ramdisk=ramdisk.gz\0" \ 140 "bootdir=/boot\0" \ 141 "bootpart=0:2\0" \ 142 "console=ttyO2,115200n8\0" \ 143 "mpurate=auto\0" \ 144 "buddy=none\0" \ 145 "optargs=\0" \ 146 "camera=none\0" \ 147 "vram=12M\0" \ 148 "dvimode=640x480MR-16@60\0" \ 149 "defaultdisplay=dvi\0" \ 150 "mmcdev=0\0" \ 151 "mmcroot=/dev/mmcblk0p2 rw\0" \ 152 "mmcrootfstype=ext3 rootwait\0" \ 153 "nandroot=ubi0:rootfs ubi.mtd=4\0" \ 154 "nandrootfstype=ubifs\0" \ 155 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 156 "ramrootfstype=ext2\0" \ 157 "mmcargs=setenv bootargs console=${console} " \ 158 "${optargs} " \ 159 "mpurate=${mpurate} " \ 160 "buddy=${buddy} "\ 161 "camera=${camera} "\ 162 "vram=${vram} " \ 163 "omapfb.mode=dvi:${dvimode} " \ 164 "omapdss.def_disp=${defaultdisplay} " \ 165 "root=${mmcroot} " \ 166 "rootfstype=${mmcrootfstype}\0" \ 167 "nandargs=setenv bootargs console=${console} " \ 168 "${optargs} " \ 169 "mpurate=${mpurate} " \ 170 "buddy=${buddy} "\ 171 "camera=${camera} "\ 172 "vram=${vram} " \ 173 "omapfb.mode=dvi:${dvimode} " \ 174 "omapdss.def_disp=${defaultdisplay} " \ 175 "root=${nandroot} " \ 176 "rootfstype=${nandrootfstype}\0" \ 177 "findfdt=" \ 178 "if test $beaglerev = AxBx; then " \ 179 "setenv fdtfile omap3-beagle.dtb; fi; " \ 180 "if test $beaglerev = Cx; then " \ 181 "setenv fdtfile omap3-beagle.dtb; fi; " \ 182 "if test $beaglerev = C4; then " \ 183 "setenv fdtfile omap3-beagle.dtb; fi; " \ 184 "if test $beaglerev = xMAB; then " \ 185 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \ 186 "if test $beaglerev = xMC; then " \ 187 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ 188 "if test $fdtfile = undefined; then " \ 189 "echo WARNING: Could not determine device tree to use; fi; \0" \ 190 "validatefdt=" \ 191 "if test $beaglerev = xMAB; then " \ 192 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \ 193 "setenv fdtfile omap3-beagle-xm.dtb; " \ 194 "fi; " \ 195 "fi; \0" \ 196 "bootenv=uEnv.txt\0" \ 197 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 198 "importbootenv=echo Importing environment from mmc ...; " \ 199 "env import -t -r $loadaddr $filesize\0" \ 200 "ramargs=setenv bootargs console=${console} " \ 201 "${optargs} " \ 202 "mpurate=${mpurate} " \ 203 "buddy=${buddy} "\ 204 "vram=${vram} " \ 205 "omapfb.mode=dvi:${dvimode} " \ 206 "omapdss.def_disp=${defaultdisplay} " \ 207 "root=${ramroot} " \ 208 "rootfstype=${ramrootfstype}\0" \ 209 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ 210 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 211 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 212 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 213 "source ${loadaddr}\0" \ 214 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 215 "mmcboot=echo Booting from mmc ...; " \ 216 "run mmcargs; " \ 217 "bootm ${loadaddr}\0" \ 218 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \ 219 "run mmcargs; " \ 220 "bootz ${loadaddr} - ${fdtaddr}\0" \ 221 "nandboot=echo Booting from nand ...; " \ 222 "run nandargs; " \ 223 "nand read ${loadaddr} 280000 400000; " \ 224 "bootm ${loadaddr}\0" \ 225 "ramboot=echo Booting from ramdisk ...; " \ 226 "run ramargs; " \ 227 "bootm ${loadaddr}\0" \ 228 "userbutton=if gpio input 173; then run userbutton_xm; " \ 229 "else run userbutton_nonxm; fi;\0" \ 230 "userbutton_xm=gpio input 4;\0" \ 231 "userbutton_nonxm=gpio input 7;\0" \ 232 BOOTENV 233 234 /* 235 * OMAP3 has 12 GP timers, they can be driven by the system clock 236 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 237 * This rate is divided by a local divisor. 238 */ 239 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 240 241 /*----------------------------------------------------------------------- 242 * FLASH and environment organization 243 */ 244 245 /* **** PISMO SUPPORT *** */ 246 #if defined(CONFIG_CMD_NAND) 247 #define CONFIG_SYS_FLASH_BASE NAND_BASE 248 #endif 249 250 /* Monitor at start of flash */ 251 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 252 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 253 254 #define CONFIG_ENV_IS_IN_NAND 1 255 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 256 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 257 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 258 259 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 260 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 261 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 262 263 #define CONFIG_OMAP3_SPI 264 265 /* Defines for SPL */ 266 #define CONFIG_SPL_OMAP3_ID_NAND 267 268 /* NAND boot config */ 269 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 270 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 271 #define CONFIG_SYS_NAND_PAGE_COUNT 64 272 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 273 #define CONFIG_SYS_NAND_OOBSIZE 64 274 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 275 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 276 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 277 10, 11, 12, 13} 278 #define CONFIG_SYS_NAND_ECCSIZE 512 279 #define CONFIG_SYS_NAND_ECCBYTES 3 280 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 281 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 282 /* NAND: SPL falcon mode configs */ 283 #ifdef CONFIG_SPL_OS_BOOT 284 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 285 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 286 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 287 #endif 288 289 #endif /* __CONFIG_H */ 290