1f904cdbbSDirk Behme /* 2f904cdbbSDirk Behme * (C) Copyright 2006-2008 3f904cdbbSDirk Behme * Texas Instruments. 4f904cdbbSDirk Behme * Richard Woodruff <r-woodruff2@ti.com> 5f904cdbbSDirk Behme * Syed Mohammed Khasim <x0khasim@ti.com> 6f904cdbbSDirk Behme * 7f904cdbbSDirk Behme * Configuration settings for the TI OMAP3530 Beagle board. 8f904cdbbSDirk Behme * 9f904cdbbSDirk Behme * See file CREDITS for list of people who contributed to this 10f904cdbbSDirk Behme * project. 11f904cdbbSDirk Behme * 12f904cdbbSDirk Behme * This program is free software; you can redistribute it and/or 13f904cdbbSDirk Behme * modify it under the terms of the GNU General Public License as 14f904cdbbSDirk Behme * published by the Free Software Foundation; either version 2 of 15f904cdbbSDirk Behme * the License, or (at your option) any later version. 16f904cdbbSDirk Behme * 17f904cdbbSDirk Behme * This program is distributed in the hope that it will be useful, 18f904cdbbSDirk Behme * but WITHOUT ANY WARRANTY; without even the implied warranty of 19f904cdbbSDirk Behme * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20f904cdbbSDirk Behme * GNU General Public License for more details. 21f904cdbbSDirk Behme * 22f904cdbbSDirk Behme * You should have received a copy of the GNU General Public License 23f904cdbbSDirk Behme * along with this program; if not, write to the Free Software 24f904cdbbSDirk Behme * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25f904cdbbSDirk Behme * MA 02111-1307 USA 26f904cdbbSDirk Behme */ 27f904cdbbSDirk Behme 28f904cdbbSDirk Behme #ifndef __CONFIG_H 29f904cdbbSDirk Behme #define __CONFIG_H 30f904cdbbSDirk Behme 31f904cdbbSDirk Behme /* 32f904cdbbSDirk Behme * High Level Configuration Options 33f904cdbbSDirk Behme */ 34f904cdbbSDirk Behme #define CONFIG_OMAP 1 /* in a TI OMAP core */ 35f904cdbbSDirk Behme #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 36f904cdbbSDirk Behme #define CONFIG_OMAP3430 1 /* which is in a 3430 */ 37f904cdbbSDirk Behme #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ 38f904cdbbSDirk Behme 39cae377b5SVaibhav Hiremath #define CONFIG_SDRC /* The chip has SDRC controller */ 40cae377b5SVaibhav Hiremath 41f904cdbbSDirk Behme #include <asm/arch/cpu.h> /* get chip and board defs */ 42f904cdbbSDirk Behme #include <asm/arch/omap3.h> 43f904cdbbSDirk Behme 446a6b62e3SSanjeev Premi /* 456a6b62e3SSanjeev Premi * Display CPU and Board information 466a6b62e3SSanjeev Premi */ 476a6b62e3SSanjeev Premi #define CONFIG_DISPLAY_CPUINFO 1 486a6b62e3SSanjeev Premi #define CONFIG_DISPLAY_BOARDINFO 1 496a6b62e3SSanjeev Premi 50f904cdbbSDirk Behme /* Clock Defines */ 51f904cdbbSDirk Behme #define V_OSCK 26000000 /* Clock output from T2 */ 52f904cdbbSDirk Behme #define V_SCLK (V_OSCK >> 1) 53f904cdbbSDirk Behme 54f904cdbbSDirk Behme #undef CONFIG_USE_IRQ /* no support for IRQs */ 55f904cdbbSDirk Behme #define CONFIG_MISC_INIT_R 56f904cdbbSDirk Behme 57b485556bSJohn Rigby #define CONFIG_OF_LIBFDT 1 58b485556bSJohn Rigby 59f904cdbbSDirk Behme #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 60f904cdbbSDirk Behme #define CONFIG_SETUP_MEMORY_TAGS 1 61f904cdbbSDirk Behme #define CONFIG_INITRD_TAG 1 62f904cdbbSDirk Behme #define CONFIG_REVISION_TAG 1 63f904cdbbSDirk Behme 64f904cdbbSDirk Behme /* 65f904cdbbSDirk Behme * Size of malloc() pool 66f904cdbbSDirk Behme */ 679c44ddccSSandeep Paulraj #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 68f904cdbbSDirk Behme /* Sector */ 699c44ddccSSandeep Paulraj #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 70f904cdbbSDirk Behme 71f904cdbbSDirk Behme /* 72f904cdbbSDirk Behme * Hardware drivers 73f904cdbbSDirk Behme */ 74f904cdbbSDirk Behme 75f904cdbbSDirk Behme /* 76f904cdbbSDirk Behme * NS16550 Configuration 77f904cdbbSDirk Behme */ 78f904cdbbSDirk Behme #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 79f904cdbbSDirk Behme 80f904cdbbSDirk Behme #define CONFIG_SYS_NS16550 81f904cdbbSDirk Behme #define CONFIG_SYS_NS16550_SERIAL 82f904cdbbSDirk Behme #define CONFIG_SYS_NS16550_REG_SIZE (-4) 83f904cdbbSDirk Behme #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 84f904cdbbSDirk Behme 85f904cdbbSDirk Behme /* 86f904cdbbSDirk Behme * select serial console configuration 87f904cdbbSDirk Behme */ 88f904cdbbSDirk Behme #define CONFIG_CONS_INDEX 3 89f904cdbbSDirk Behme #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 90f904cdbbSDirk Behme #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */ 91f904cdbbSDirk Behme 92f904cdbbSDirk Behme /* allow to overwrite serial and ethaddr */ 93f904cdbbSDirk Behme #define CONFIG_ENV_OVERWRITE 94f904cdbbSDirk Behme #define CONFIG_BAUDRATE 115200 95f904cdbbSDirk Behme #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 96f904cdbbSDirk Behme 115200} 970cd31144SSteve Sakoman #define CONFIG_GENERIC_MMC 1 98f904cdbbSDirk Behme #define CONFIG_MMC 1 990cd31144SSteve Sakoman #define CONFIG_OMAP_HSMMC 1 100f904cdbbSDirk Behme #define CONFIG_DOS_PARTITION 1 101f904cdbbSDirk Behme 10270d8c944SJason Kridner /* Status LED */ 10370d8c944SJason Kridner #define CONFIG_STATUS_LED 1 10470d8c944SJason Kridner #define CONFIG_BOARD_SPECIFIC_LED 1 10570d8c944SJason Kridner #define STATUS_LED_BIT 0x01 10670d8c944SJason Kridner #define STATUS_LED_STATE STATUS_LED_ON 10770d8c944SJason Kridner #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 10870d8c944SJason Kridner #define STATUS_LED_BIT1 0x02 10970d8c944SJason Kridner #define STATUS_LED_STATE1 STATUS_LED_ON 11070d8c944SJason Kridner #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 11170d8c944SJason Kridner #define STATUS_LED_BOOT STATUS_LED_BIT 11270d8c944SJason Kridner #define STATUS_LED_GREEN STATUS_LED_BIT1 11370d8c944SJason Kridner 11430563a04SNishanth Menon /* DDR - I use Micron DDR */ 11530563a04SNishanth Menon #define CONFIG_OMAP3_MICRON_DDR 1 11630563a04SNishanth Menon 117f74fc4aeSJason Kridner /* Enable Multi Bus support for I2C */ 118f74fc4aeSJason Kridner #define CONFIG_I2C_MULTI_BUS 1 119f74fc4aeSJason Kridner 120f74fc4aeSJason Kridner /* Probe all devices */ 121*8c4e0ca6SSanjeev Premi #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} 122f74fc4aeSJason Kridner 12325374bfbSTom Rix /* USB */ 12425374bfbSTom Rix #define CONFIG_MUSB_UDC 1 12525374bfbSTom Rix #define CONFIG_USB_OMAP3 1 12625374bfbSTom Rix #define CONFIG_TWL4030_USB 1 12725374bfbSTom Rix 12825374bfbSTom Rix /* USB device configuration */ 12925374bfbSTom Rix #define CONFIG_USB_DEVICE 1 13025374bfbSTom Rix #define CONFIG_USB_TTY 1 13125374bfbSTom Rix #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 13225374bfbSTom Rix 133d90859a6SAlexander Holler /* USB EHCI */ 134d90859a6SAlexander Holler #define CONFIG_CMD_USB 135d90859a6SAlexander Holler #define CONFIG_USB_EHCI 136d90859a6SAlexander Holler #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 1372162439aSKoen Kooi #define CONFIG_USB_HOST_ETHER 1382162439aSKoen Kooi #define CONFIG_USB_ETHER_SMSC95XX 13954b62d59SKoen Kooi #define CONFIG_USB_ETHER_ASIX 1402162439aSKoen Kooi 1412162439aSKoen Kooi #define CONFIG_NET_MULTI 142d90859a6SAlexander Holler 143f904cdbbSDirk Behme /* commands to include */ 144f904cdbbSDirk Behme #include <config_cmd_default.h> 145f904cdbbSDirk Behme 14695c6f6d3SHeiko Schocher #define CONFIG_CMD_CACHE 147f904cdbbSDirk Behme #define CONFIG_CMD_EXT2 /* EXT2 Support */ 148f904cdbbSDirk Behme #define CONFIG_CMD_FAT /* FAT support */ 149f904cdbbSDirk Behme #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 150917cfc70SNishanth Menon #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 151942556a9SStefan Roese #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 152917cfc70SNishanth Menon #define MTDIDS_DEFAULT "nand0=nand" 153917cfc70SNishanth Menon #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 154917cfc70SNishanth Menon "1920k(u-boot),128k(u-boot-env),"\ 155917cfc70SNishanth Menon "4m(kernel),-(fs)" 156f904cdbbSDirk Behme 157f904cdbbSDirk Behme #define CONFIG_CMD_I2C /* I2C serial bus support */ 158f904cdbbSDirk Behme #define CONFIG_CMD_MMC /* MMC support */ 159d90859a6SAlexander Holler #define CONFIG_USB_STORAGE /* USB storage support */ 160f904cdbbSDirk Behme #define CONFIG_CMD_NAND /* NAND support */ 16170d8c944SJason Kridner #define CONFIG_CMD_LED /* LED support */ 1622162439aSKoen Kooi #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 1632162439aSKoen Kooi #define CONFIG_CMD_NFS /* NFS support */ 1642162439aSKoen Kooi #define CONFIG_CMD_PING 16554b62d59SKoen Kooi #define CONFIG_CMD_DHCP 166933d3701SJason Kridner #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ 167f904cdbbSDirk Behme 168f904cdbbSDirk Behme #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 169f904cdbbSDirk Behme #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 170f904cdbbSDirk Behme #undef CONFIG_CMD_IMI /* iminfo */ 171f904cdbbSDirk Behme #undef CONFIG_CMD_IMLS /* List all found images */ 172f904cdbbSDirk Behme 173f904cdbbSDirk Behme #define CONFIG_SYS_NO_FLASH 1740297ec7eSTom Rix #define CONFIG_HARD_I2C 1 175f904cdbbSDirk Behme #define CONFIG_SYS_I2C_SPEED 100000 176f904cdbbSDirk Behme #define CONFIG_SYS_I2C_SLAVE 1 177f904cdbbSDirk Behme #define CONFIG_SYS_I2C_BUS 0 178f904cdbbSDirk Behme #define CONFIG_SYS_I2C_BUS_SELECT 1 179ca5f80aeSKoen Kooi #define CONFIG_I2C_MULTI_BUS 1 180f904cdbbSDirk Behme #define CONFIG_DRIVER_OMAP34XX_I2C 1 18125a4d017SKoen Kooi #define CONFIG_VIDEO_OMAP3 /* DSS Support */ 182f904cdbbSDirk Behme 183f904cdbbSDirk Behme /* 1842c155130STom Rix * TWL4030 1852c155130STom Rix */ 1862c155130STom Rix #define CONFIG_TWL4030_POWER 1 1872c155130STom Rix #define CONFIG_TWL4030_LED 1 1882c155130STom Rix 1892c155130STom Rix /* 190f904cdbbSDirk Behme * Board NAND Info. 191f904cdbbSDirk Behme */ 19260c23173SSteve Sakoman #define CONFIG_SYS_NAND_QUIET_TEST 1 193f904cdbbSDirk Behme #define CONFIG_NAND_OMAP_GPMC 194f904cdbbSDirk Behme #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 195f904cdbbSDirk Behme /* to access nand */ 196f904cdbbSDirk Behme #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 197f904cdbbSDirk Behme /* to access nand at */ 198f904cdbbSDirk Behme /* CS0 */ 199f904cdbbSDirk Behme #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 200f904cdbbSDirk Behme 201f904cdbbSDirk Behme #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 202f904cdbbSDirk Behme /* devices */ 203f904cdbbSDirk Behme #define CONFIG_JFFS2_NAND 204f904cdbbSDirk Behme /* nand device jffs2 lives on */ 205f904cdbbSDirk Behme #define CONFIG_JFFS2_DEV "nand0" 206f904cdbbSDirk Behme /* start of jffs2 partition */ 207f904cdbbSDirk Behme #define CONFIG_JFFS2_PART_OFFSET 0x680000 208f904cdbbSDirk Behme #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 209f904cdbbSDirk Behme /* partition */ 210f904cdbbSDirk Behme 211f904cdbbSDirk Behme /* Environment information */ 2124c37e8deSKoen Kooi #define CONFIG_BOOTDELAY 2 213f904cdbbSDirk Behme 214f904cdbbSDirk Behme #define CONFIG_EXTRA_ENV_SETTINGS \ 215f4b36ea9SJason Kridner "loadaddr=0x80200000\0" \ 216f4b36ea9SJason Kridner "rdaddr=0x81000000\0" \ 21725374bfbSTom Rix "usbtty=cdc_acm\0" \ 218ec556ffcSJoel A Fernandes "usbethaddr=de:ad:be:ef\0" \ 219e6829308SJoel A Fernandes "bootfile=uImage.beagle\0" \ 220f904cdbbSDirk Behme "console=ttyS2,115200n8\0" \ 221f6e593bbSKoen Kooi "mpurate=auto\0" \ 222b1660314SKoen Kooi "buddy=none "\ 223c522eac4SJason Kridner "optargs=\0" \ 224c522eac4SJason Kridner "camera=none\0" \ 22513d2cb98SSteve Sakoman "vram=12M\0" \ 226f4b36ea9SJason Kridner "dvimode=640x480MR-16@60\0" \ 22713d2cb98SSteve Sakoman "defaultdisplay=dvi\0" \ 2280cd31144SSteve Sakoman "mmcdev=0\0" \ 22913d2cb98SSteve Sakoman "mmcroot=/dev/mmcblk0p2 rw\0" \ 23013d2cb98SSteve Sakoman "mmcrootfstype=ext3 rootwait\0" \ 23113d2cb98SSteve Sakoman "nandroot=/dev/mtdblock4 rw\0" \ 23213d2cb98SSteve Sakoman "nandrootfstype=jffs2\0" \ 233f4b36ea9SJason Kridner "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ 234f4b36ea9SJason Kridner "ramrootfstype=ext2\0" \ 235f904cdbbSDirk Behme "mmcargs=setenv bootargs console=${console} " \ 236c522eac4SJason Kridner "${optargs} " \ 2375af32460SSteve Sakoman "mpurate=${mpurate} " \ 238b1660314SKoen Kooi "buddy=${buddy} "\ 239c522eac4SJason Kridner "camera=${camera} "\ 24013d2cb98SSteve Sakoman "vram=${vram} " \ 24113d2cb98SSteve Sakoman "omapfb.mode=dvi:${dvimode} " \ 24213d2cb98SSteve Sakoman "omapdss.def_disp=${defaultdisplay} " \ 24313d2cb98SSteve Sakoman "root=${mmcroot} " \ 24413d2cb98SSteve Sakoman "rootfstype=${mmcrootfstype}\0" \ 245f904cdbbSDirk Behme "nandargs=setenv bootargs console=${console} " \ 246c522eac4SJason Kridner "${optargs} " \ 2475af32460SSteve Sakoman "mpurate=${mpurate} " \ 248b1660314SKoen Kooi "buddy=${buddy} "\ 249c522eac4SJason Kridner "camera=${camera} "\ 25013d2cb98SSteve Sakoman "vram=${vram} " \ 25113d2cb98SSteve Sakoman "omapfb.mode=dvi:${dvimode} " \ 25213d2cb98SSteve Sakoman "omapdss.def_disp=${defaultdisplay} " \ 25313d2cb98SSteve Sakoman "root=${nandroot} " \ 25413d2cb98SSteve Sakoman "rootfstype=${nandrootfstype}\0" \ 255f835ea71SJason Kridner "bootenv=uEnv.txt\0" \ 256f835ea71SJason Kridner "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 257cf073e49SAlexander Holler "importbootenv=echo Importing environment from mmc ...; " \ 258cf073e49SAlexander Holler "env import -t $loadaddr $filesize\0" \ 259f4b36ea9SJason Kridner "ramargs=setenv bootargs console=${console} " \ 260f4b36ea9SJason Kridner "${optargs} " \ 261f4b36ea9SJason Kridner "mpurate=${mpurate} " \ 262f4b36ea9SJason Kridner "buddy=${buddy} "\ 263f4b36ea9SJason Kridner "vram=${vram} " \ 264f4b36ea9SJason Kridner "omapfb.mode=dvi:${dvimode} " \ 265f4b36ea9SJason Kridner "omapdss.def_disp=${defaultdisplay} " \ 266f4b36ea9SJason Kridner "root=${ramroot} " \ 267f4b36ea9SJason Kridner "rootfstype=${ramrootfstype}\0" \ 268f4b36ea9SJason Kridner "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 269e5549f0fSKoen Kooi "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 270e5549f0fSKoen Kooi "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \ 271f904cdbbSDirk Behme "mmcboot=echo Booting from mmc ...; " \ 272f904cdbbSDirk Behme "run mmcargs; " \ 273f904cdbbSDirk Behme "bootm ${loadaddr}\0" \ 274f904cdbbSDirk Behme "nandboot=echo Booting from nand ...; " \ 275f904cdbbSDirk Behme "run nandargs; " \ 276f904cdbbSDirk Behme "nand read ${loadaddr} 280000 400000; " \ 277f904cdbbSDirk Behme "bootm ${loadaddr}\0" \ 278f4b36ea9SJason Kridner "ramboot=echo Booting from ramdisk ...; " \ 279f4b36ea9SJason Kridner "run ramargs; " \ 280f4b36ea9SJason Kridner "bootm ${loadaddr}\0" \ 281f904cdbbSDirk Behme 282f904cdbbSDirk Behme #define CONFIG_BOOTCOMMAND \ 2830cd31144SSteve Sakoman "if mmc rescan ${mmcdev}; then " \ 284f835ea71SJason Kridner "if userbutton; then " \ 285f835ea71SJason Kridner "setenv bootenv user.txt;" \ 286f835ea71SJason Kridner "fi;" \ 287cf073e49SAlexander Holler "echo SD/MMC found on device ${mmcdev};" \ 288cf073e49SAlexander Holler "if run loadbootenv; then " \ 289f835ea71SJason Kridner "echo Loaded environment from ${bootenv};" \ 290cf073e49SAlexander Holler "run importbootenv;" \ 291cf073e49SAlexander Holler "fi;" \ 292cf073e49SAlexander Holler "if test -n $uenvcmd; then " \ 293cf073e49SAlexander Holler "echo Running uenvcmd ...;" \ 294cf073e49SAlexander Holler "run uenvcmd;" \ 295cf073e49SAlexander Holler "fi;" \ 296f904cdbbSDirk Behme "if run loaduimage; then " \ 297f904cdbbSDirk Behme "run mmcboot;" \ 298f904cdbbSDirk Behme "fi;" \ 299f904cdbbSDirk Behme "fi;" \ 300cf073e49SAlexander Holler "run nandboot;" \ 301f904cdbbSDirk Behme 302f904cdbbSDirk Behme #define CONFIG_AUTO_COMPLETE 1 303f904cdbbSDirk Behme /* 304f904cdbbSDirk Behme * Miscellaneous configurable options 305f904cdbbSDirk Behme */ 306f904cdbbSDirk Behme #define CONFIG_SYS_LONGHELP /* undef to save memory */ 307f904cdbbSDirk Behme #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 308f904cdbbSDirk Behme #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 3091270ec13SRobert P. J. Day #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # " 310f62b1257SVaibhav Hiremath #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 311f904cdbbSDirk Behme /* Print Buffer Size */ 312f904cdbbSDirk Behme #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 313f904cdbbSDirk Behme sizeof(CONFIG_SYS_PROMPT) + 16) 314933d3701SJason Kridner #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 315f904cdbbSDirk Behme /* Boot Argument Buffer Size */ 316f904cdbbSDirk Behme #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 317f904cdbbSDirk Behme 318780a97f8SJason Kridner #define CONFIG_SYS_ALT_MEMTEST 1 319780a97f8SJason Kridner #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ 320780a97f8SJason Kridner /* defaults */ 321780a97f8SJason Kridner #define CONFIG_SYS_MEMTEST_END (0x87FFFFFF) /* 128MB */ 322780a97f8SJason Kridner #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ 323f904cdbbSDirk Behme 324f904cdbbSDirk Behme #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 325f904cdbbSDirk Behme /* load address */ 326f904cdbbSDirk Behme 327f904cdbbSDirk Behme /* 328d3a513c2SManikandan Pillai * OMAP3 has 12 GP timers, they can be driven by the system clock 329d3a513c2SManikandan Pillai * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 330d3a513c2SManikandan Pillai * This rate is divided by a local divisor. 331f904cdbbSDirk Behme */ 332f904cdbbSDirk Behme #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 333d3a513c2SManikandan Pillai #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 334d3a513c2SManikandan Pillai #define CONFIG_SYS_HZ 1000 335f904cdbbSDirk Behme 336f904cdbbSDirk Behme /*----------------------------------------------------------------------- 337f904cdbbSDirk Behme * Stack sizes 338f904cdbbSDirk Behme * 339f904cdbbSDirk Behme * The stack sizes are set up in start.S using the settings below 340f904cdbbSDirk Behme */ 3419c44ddccSSandeep Paulraj #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 342f904cdbbSDirk Behme #ifdef CONFIG_USE_IRQ 3439c44ddccSSandeep Paulraj #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ 3449c44ddccSSandeep Paulraj #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ 345f904cdbbSDirk Behme #endif 346f904cdbbSDirk Behme 347f904cdbbSDirk Behme /*----------------------------------------------------------------------- 348f904cdbbSDirk Behme * Physical Memory Map 349f904cdbbSDirk Behme */ 350f904cdbbSDirk Behme #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 351f904cdbbSDirk Behme #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 3529c44ddccSSandeep Paulraj #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ 353f904cdbbSDirk Behme #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 354f904cdbbSDirk Behme 355f904cdbbSDirk Behme /* SDRAM Bank Allocation method */ 356f904cdbbSDirk Behme #define SDRC_R_B_C 1 357f904cdbbSDirk Behme 358f904cdbbSDirk Behme /*----------------------------------------------------------------------- 359f904cdbbSDirk Behme * FLASH and environment organization 360f904cdbbSDirk Behme */ 361f904cdbbSDirk Behme 362f904cdbbSDirk Behme /* **** PISMO SUPPORT *** */ 363f904cdbbSDirk Behme 364f904cdbbSDirk Behme /* Configure the PISMO */ 365f904cdbbSDirk Behme #define PISMO1_NAND_SIZE GPMC_SIZE_128M 366f904cdbbSDirk Behme #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 367f904cdbbSDirk Behme 3689c44ddccSSandeep Paulraj #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 369f904cdbbSDirk Behme 3706cbec7b3SLuca Ceresoli #if defined(CONFIG_CMD_NAND) 3716cbec7b3SLuca Ceresoli #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 3726cbec7b3SLuca Ceresoli #endif 373f904cdbbSDirk Behme 374f904cdbbSDirk Behme /* Monitor at start of flash */ 375f904cdbbSDirk Behme #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 376f904cdbbSDirk Behme #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 377f904cdbbSDirk Behme 378f904cdbbSDirk Behme #define CONFIG_ENV_IS_IN_NAND 1 379f904cdbbSDirk Behme #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 380f904cdbbSDirk Behme #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 381f904cdbbSDirk Behme 3826cbec7b3SLuca Ceresoli #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 3836cbec7b3SLuca Ceresoli #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 384f904cdbbSDirk Behme #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 385f904cdbbSDirk Behme 386561142afSHeiko Schocher #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 38731bfcf1cSSteve Sakoman #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 38831bfcf1cSSteve Sakoman #define CONFIG_SYS_INIT_RAM_SIZE 0x800 38931bfcf1cSSteve Sakoman #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 39031bfcf1cSSteve Sakoman CONFIG_SYS_INIT_RAM_SIZE - \ 39131bfcf1cSSteve Sakoman GENERATED_GBL_DATA_SIZE) 392561142afSHeiko Schocher 39353736baaSDirk Behme #define CONFIG_OMAP3_SPI 39453736baaSDirk Behme 395f904cdbbSDirk Behme #endif /* __CONFIG_H */ 396