1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef __MX6UL_14X14_EVK_CONFIG_H 9 #define __MX6UL_14X14_EVK_CONFIG_H 10 11 12 #include <asm/arch/imx-regs.h> 13 #include <linux/sizes.h> 14 #include "mx6_common.h" 15 #include <asm/imx-common/gpio.h> 16 17 /* SPL options */ 18 #define CONFIG_SPL_LIBCOMMON_SUPPORT 19 #define CONFIG_SPL_MMC_SUPPORT 20 #define CONFIG_SPL_FAT_SUPPORT 21 #include "imx6_spl.h" 22 23 #define CONFIG_ROM_UNIFIED_SECTIONS 24 #define CONFIG_SYS_GENERIC_BOARD 25 #define CONFIG_DISPLAY_CPUINFO 26 #define CONFIG_DISPLAY_BOARDINFO 27 28 /* Size of malloc() pool */ 29 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 30 31 #define CONFIG_BOARD_EARLY_INIT_F 32 #define CONFIG_BOARD_LATE_INIT 33 34 #define CONFIG_MXC_UART 35 #define CONFIG_MXC_UART_BASE UART1_BASE 36 37 /* MMC Configs */ 38 #ifdef CONFIG_FSL_USDHC 39 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 40 41 /* NAND pin conflicts with usdhc2 */ 42 #ifdef CONFIG_NAND_MXS 43 #define CONFIG_SYS_FSL_USDHC_NUM 1 44 #else 45 #define CONFIG_SYS_FSL_USDHC_NUM 2 46 #endif 47 48 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 49 #endif 50 51 #undef CONFIG_BOOTM_NETBSD 52 #undef CONFIG_BOOTM_PLAN9 53 #undef CONFIG_BOOTM_RTEMS 54 55 #undef CONFIG_CMD_EXPORTENV 56 #undef CONFIG_CMD_IMPORTENV 57 58 /* I2C configs */ 59 #define CONFIG_CMD_I2C 60 #ifdef CONFIG_CMD_I2C 61 #define CONFIG_SYS_I2C 62 #define CONFIG_SYS_I2C_MXC 63 #define CONFIG_SYS_I2C_SPEED 100000 64 #endif 65 66 #define PHYS_SDRAM_SIZE SZ_512M 67 68 #undef CONFIG_CMD_IMLS 69 70 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 71 72 #define CONFIG_EXTRA_ENV_SETTINGS \ 73 "script=boot.scr\0" \ 74 "image=zImage\0" \ 75 "console=ttymxc0\0" \ 76 "fdt_high=0xffffffff\0" \ 77 "initrd_high=0xffffffff\0" \ 78 "fdt_file=imx6ul-14x14-evk.dtb\0" \ 79 "fdt_addr=0x83000000\0" \ 80 "boot_fdt=try\0" \ 81 "ip_dyn=yes\0" \ 82 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 83 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 84 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 85 "mmcautodetect=yes\0" \ 86 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 87 "root=${mmcroot}\0" \ 88 "loadbootscript=" \ 89 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 90 "bootscript=echo Running bootscript from mmc ...; " \ 91 "source\0" \ 92 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 93 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 94 "mmcboot=echo Booting from mmc ...; " \ 95 "run mmcargs; " \ 96 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 97 "if run loadfdt; then " \ 98 "bootz ${loadaddr} - ${fdt_addr}; " \ 99 "else " \ 100 "if test ${boot_fdt} = try; then " \ 101 "bootz; " \ 102 "else " \ 103 "echo WARN: Cannot load the DT; " \ 104 "fi; " \ 105 "fi; " \ 106 "else " \ 107 "bootz; " \ 108 "fi;\0" \ 109 "netargs=setenv bootargs console=${console},${baudrate} " \ 110 "root=/dev/nfs " \ 111 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 112 "netboot=echo Booting from net ...; " \ 113 "run netargs; " \ 114 "if test ${ip_dyn} = yes; then " \ 115 "setenv get_cmd dhcp; " \ 116 "else " \ 117 "setenv get_cmd tftp; " \ 118 "fi; " \ 119 "${get_cmd} ${image}; " \ 120 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 121 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 122 "bootz ${loadaddr} - ${fdt_addr}; " \ 123 "else " \ 124 "if test ${boot_fdt} = try; then " \ 125 "bootz; " \ 126 "else " \ 127 "echo WARN: Cannot load the DT; " \ 128 "fi; " \ 129 "fi; " \ 130 "else " \ 131 "bootz; " \ 132 "fi;\0" 133 134 #define CONFIG_BOOTCOMMAND \ 135 "mmc dev ${mmcdev};" \ 136 "mmc dev ${mmcdev}; if mmc rescan; then " \ 137 "if run loadbootscript; then " \ 138 "run bootscript; " \ 139 "else " \ 140 "if run loadimage; then " \ 141 "run mmcboot; " \ 142 "else run netboot; " \ 143 "fi; " \ 144 "fi; " \ 145 "else run netboot; fi" 146 147 /* Miscellaneous configurable options */ 148 /* Print Buffer Size */ 149 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 150 151 #define CONFIG_CMD_MEMTEST 152 #define CONFIG_SYS_MEMTEST_START 0x80000000 153 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) 154 155 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 156 #define CONFIG_SYS_HZ 1000 157 158 #define CONFIG_CMDLINE_EDITING 159 #define CONFIG_STACKSIZE SZ_128K 160 161 /* Physical Memory Map */ 162 #define CONFIG_NR_DRAM_BANKS 1 163 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 164 165 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 166 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 167 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 168 169 #define CONFIG_SYS_INIT_SP_OFFSET \ 170 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 171 #define CONFIG_SYS_INIT_SP_ADDR \ 172 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 173 174 /* FLASH and environment organization */ 175 #define CONFIG_SYS_NO_FLASH 176 177 #define CONFIG_ENV_SIZE SZ_8K 178 #define CONFIG_ENV_IS_IN_MMC 179 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 180 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 181 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 182 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 183 184 #define CONFIG_OF_LIBFDT 185 #define CONFIG_CMD_BOOTZ 186 #define CONFIG_CMD_BMODE 187 188 #ifndef CONFIG_SYS_DCACHE_OFF 189 #define CONFIG_CMD_CACHE 190 #endif 191 192 #define CONFIG_FSL_QSPI 193 #ifdef CONFIG_FSL_QSPI 194 #define CONFIG_CMD_SF 195 #define CONFIG_SPI_FLASH 196 #define CONFIG_SPI_FLASH_STMICRO 197 #define CONFIG_SPI_FLASH_BAR 198 #define CONFIG_SF_DEFAULT_BUS 0 199 #define CONFIG_SF_DEFAULT_CS 0 200 #define CONFIG_SF_DEFAULT_SPEED 40000000 201 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 202 #define FSL_QSPI_FLASH_NUM 1 203 #define FSL_QSPI_FLASH_SIZE SZ_32M 204 #endif 205 206 /* USB Configs */ 207 #define CONFIG_CMD_USB 208 #ifdef CONFIG_CMD_USB 209 #define CONFIG_USB_EHCI 210 #define CONFIG_USB_EHCI_MX6 211 #define CONFIG_USB_STORAGE 212 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 213 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 214 #define CONFIG_MXC_USB_FLAGS 0 215 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 216 #endif 217 218 #ifdef CONFIG_CMD_NET 219 #define CONFIG_FEC_MXC 220 #define CONFIG_MII 221 #define CONFIG_FEC_ENET_DEV 1 222 223 #if (CONFIG_FEC_ENET_DEV == 0) 224 #define IMX_FEC_BASE ENET_BASE_ADDR 225 #define CONFIG_FEC_MXC_PHYADDR 0x2 226 #define CONFIG_FEC_XCV_TYPE RMII 227 #elif (CONFIG_FEC_ENET_DEV == 1) 228 #define IMX_FEC_BASE ENET2_BASE_ADDR 229 #define CONFIG_FEC_MXC_PHYADDR 0x1 230 #define CONFIG_FEC_XCV_TYPE RMII 231 #endif 232 #define CONFIG_ETHPRIME "FEC" 233 234 #define CONFIG_PHYLIB 235 #define CONFIG_PHY_MICREL 236 #define CONFIG_FEC_DMA_MINALIGN 64 237 #endif 238 239 #define CONFIG_IMX_THERMAL 240 241 #endif 242