1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef __MX6UL_14X14_EVK_CONFIG_H 9 #define __MX6UL_14X14_EVK_CONFIG_H 10 11 12 #include <asm/arch/imx-regs.h> 13 #include <linux/sizes.h> 14 #include "mx6_common.h" 15 #include <asm/imx-common/gpio.h> 16 17 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) 18 19 /* SPL options */ 20 #define CONFIG_SPL_LIBCOMMON_SUPPORT 21 #define CONFIG_SPL_MMC_SUPPORT 22 #include "imx6_spl.h" 23 24 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 25 26 #define CONFIG_DISPLAY_CPUINFO 27 #define CONFIG_DISPLAY_BOARDINFO 28 29 /* Size of malloc() pool */ 30 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 31 32 #define CONFIG_BOARD_EARLY_INIT_F 33 #define CONFIG_BOARD_LATE_INIT 34 35 #define CONFIG_MXC_UART 36 #define CONFIG_MXC_UART_BASE UART1_BASE 37 38 /* MMC Configs */ 39 #ifdef CONFIG_FSL_USDHC 40 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 41 42 /* NAND pin conflicts with usdhc2 */ 43 #ifdef CONFIG_NAND_MXS 44 #define CONFIG_SYS_FSL_USDHC_NUM 1 45 #else 46 #define CONFIG_SYS_FSL_USDHC_NUM 2 47 #endif 48 49 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 50 #endif 51 52 /* I2C configs */ 53 #define CONFIG_CMD_I2C 54 #ifdef CONFIG_CMD_I2C 55 #define CONFIG_SYS_I2C 56 #define CONFIG_SYS_I2C_MXC 57 #define CONFIG_SYS_I2C_SPEED 100000 58 59 /* PMIC only for 9X9 EVK */ 60 #define CONFIG_POWER 61 #define CONFIG_POWER_I2C 62 #define CONFIG_POWER_PFUZE3000 63 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 64 #endif 65 66 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 67 68 #define CONFIG_EXTRA_ENV_SETTINGS \ 69 "script=boot.scr\0" \ 70 "image=zImage\0" \ 71 "console=ttymxc0\0" \ 72 "fdt_high=0xffffffff\0" \ 73 "initrd_high=0xffffffff\0" \ 74 "fdt_file=undefined\0" \ 75 "fdt_addr=0x83000000\0" \ 76 "boot_fdt=try\0" \ 77 "ip_dyn=yes\0" \ 78 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 79 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 80 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 81 "mmcautodetect=yes\0" \ 82 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 83 "root=${mmcroot}\0" \ 84 "loadbootscript=" \ 85 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 86 "bootscript=echo Running bootscript from mmc ...; " \ 87 "source\0" \ 88 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 89 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 90 "mmcboot=echo Booting from mmc ...; " \ 91 "run mmcargs; " \ 92 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 93 "if run loadfdt; then " \ 94 "bootz ${loadaddr} - ${fdt_addr}; " \ 95 "else " \ 96 "if test ${boot_fdt} = try; then " \ 97 "bootz; " \ 98 "else " \ 99 "echo WARN: Cannot load the DT; " \ 100 "fi; " \ 101 "fi; " \ 102 "else " \ 103 "bootz; " \ 104 "fi;\0" \ 105 "netargs=setenv bootargs console=${console},${baudrate} " \ 106 "root=/dev/nfs " \ 107 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 108 "netboot=echo Booting from net ...; " \ 109 "run netargs; " \ 110 "if test ${ip_dyn} = yes; then " \ 111 "setenv get_cmd dhcp; " \ 112 "else " \ 113 "setenv get_cmd tftp; " \ 114 "fi; " \ 115 "${get_cmd} ${image}; " \ 116 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 117 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 118 "bootz ${loadaddr} - ${fdt_addr}; " \ 119 "else " \ 120 "if test ${boot_fdt} = try; then " \ 121 "bootz; " \ 122 "else " \ 123 "echo WARN: Cannot load the DT; " \ 124 "fi; " \ 125 "fi; " \ 126 "else " \ 127 "bootz; " \ 128 "fi;\0" \ 129 "findfdt="\ 130 "if test $fdt_file = undefined; then " \ 131 "if test $board_name = EVK && test $board_rev = 9X9; then " \ 132 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \ 133 "if test $board_name = EVK && test $board_rev = 14X14; then " \ 134 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \ 135 "if test $fdt_file = undefined; then " \ 136 "echo WARNING: Could not determine dtb to use; fi; " \ 137 "fi;\0" \ 138 139 #define CONFIG_BOOTCOMMAND \ 140 "run findfdt;" \ 141 "mmc dev ${mmcdev};" \ 142 "mmc dev ${mmcdev}; if mmc rescan; then " \ 143 "if run loadbootscript; then " \ 144 "run bootscript; " \ 145 "else " \ 146 "if run loadimage; then " \ 147 "run mmcboot; " \ 148 "else run netboot; " \ 149 "fi; " \ 150 "fi; " \ 151 "else run netboot; fi" 152 153 /* Miscellaneous configurable options */ 154 /* Print Buffer Size */ 155 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 156 157 #define CONFIG_CMD_MEMTEST 158 #define CONFIG_SYS_MEMTEST_START 0x80000000 159 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) 160 161 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 162 #define CONFIG_SYS_HZ 1000 163 164 #define CONFIG_CMDLINE_EDITING 165 #define CONFIG_STACKSIZE SZ_128K 166 167 /* Physical Memory Map */ 168 #define CONFIG_NR_DRAM_BANKS 1 169 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 170 171 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 172 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 173 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 174 175 #define CONFIG_SYS_INIT_SP_OFFSET \ 176 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 177 #define CONFIG_SYS_INIT_SP_ADDR \ 178 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 179 180 /* FLASH and environment organization */ 181 #define CONFIG_SYS_NO_FLASH 182 183 #define CONFIG_ENV_SIZE SZ_8K 184 #define CONFIG_ENV_IS_IN_MMC 185 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 186 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 187 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 188 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 189 190 #define CONFIG_OF_LIBFDT 191 #define CONFIG_CMD_BOOTZ 192 #define CONFIG_CMD_BMODE 193 194 #ifndef CONFIG_SYS_DCACHE_OFF 195 #define CONFIG_CMD_CACHE 196 #endif 197 198 #define CONFIG_FSL_QSPI 199 #ifdef CONFIG_FSL_QSPI 200 #define CONFIG_CMD_SF 201 #define CONFIG_SPI_FLASH 202 #define CONFIG_SPI_FLASH_STMICRO 203 #define CONFIG_SPI_FLASH_BAR 204 #define CONFIG_SF_DEFAULT_BUS 0 205 #define CONFIG_SF_DEFAULT_CS 0 206 #define CONFIG_SF_DEFAULT_SPEED 40000000 207 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 208 #define FSL_QSPI_FLASH_NUM 1 209 #define FSL_QSPI_FLASH_SIZE SZ_32M 210 #endif 211 212 /* USB Configs */ 213 #define CONFIG_CMD_USB 214 #ifdef CONFIG_CMD_USB 215 #define CONFIG_USB_EHCI 216 #define CONFIG_USB_EHCI_MX6 217 #define CONFIG_USB_STORAGE 218 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 219 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 220 #define CONFIG_MXC_USB_FLAGS 0 221 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 222 #endif 223 224 #ifdef CONFIG_CMD_NET 225 #define CONFIG_FEC_MXC 226 #define CONFIG_MII 227 #define CONFIG_FEC_ENET_DEV 1 228 229 #if (CONFIG_FEC_ENET_DEV == 0) 230 #define IMX_FEC_BASE ENET_BASE_ADDR 231 #define CONFIG_FEC_MXC_PHYADDR 0x2 232 #define CONFIG_FEC_XCV_TYPE RMII 233 #elif (CONFIG_FEC_ENET_DEV == 1) 234 #define IMX_FEC_BASE ENET2_BASE_ADDR 235 #define CONFIG_FEC_MXC_PHYADDR 0x1 236 #define CONFIG_FEC_XCV_TYPE RMII 237 #endif 238 #define CONFIG_ETHPRIME "FEC" 239 240 #define CONFIG_PHYLIB 241 #define CONFIG_PHY_MICREL 242 #endif 243 244 #define CONFIG_IMX_THERMAL 245 246 #endif 247