xref: /rk3399_rockchip-uboot/include/configs/mx6ul_14x14_evk.h (revision 78d1e1d0a157c8b48ea19be6170b992745d30f38)
1 /*
2  * Copyright (C) 2015 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
10 
11 
12 #include <asm/arch/imx-regs.h>
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
15 #include <asm/imx-common/gpio.h>
16 
17 #define is_mx6ul_9x9_evk()	CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
18 
19 /* SPL options */
20 #define CONFIG_SPL_LIBCOMMON_SUPPORT
21 #define CONFIG_SPL_MMC_SUPPORT
22 #include "imx6_spl.h"
23 
24 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
25 
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
28 
29 /* Size of malloc() pool */
30 #define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)
31 
32 #define CONFIG_BOARD_EARLY_INIT_F
33 #define CONFIG_BOARD_LATE_INIT
34 
35 #define CONFIG_MXC_UART
36 #define CONFIG_MXC_UART_BASE		UART1_BASE
37 
38 /* MMC Configs */
39 #ifdef CONFIG_FSL_USDHC
40 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
41 
42 /* NAND pin conflicts with usdhc2 */
43 #ifdef CONFIG_NAND_MXS
44 #define CONFIG_SYS_FSL_USDHC_NUM	1
45 #else
46 #define CONFIG_SYS_FSL_USDHC_NUM	2
47 #endif
48 
49 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
50 #endif
51 
52 /* I2C configs */
53 #ifdef CONFIG_CMD_I2C
54 #define CONFIG_SYS_I2C
55 #define CONFIG_SYS_I2C_MXC
56 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
57 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
58 #define CONFIG_SYS_I2C_SPEED		100000
59 
60 /* PMIC only for 9X9 EVK */
61 #define CONFIG_POWER
62 #define CONFIG_POWER_I2C
63 #define CONFIG_POWER_PFUZE3000
64 #define CONFIG_POWER_PFUZE3000_I2C_ADDR  0x08
65 #endif
66 
67 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
68 
69 #define CONFIG_EXTRA_ENV_SETTINGS \
70 	"script=boot.scr\0" \
71 	"image=zImage\0" \
72 	"console=ttymxc0\0" \
73 	"fdt_high=0xffffffff\0" \
74 	"initrd_high=0xffffffff\0" \
75 	"fdt_file=undefined\0" \
76 	"fdt_addr=0x83000000\0" \
77 	"boot_fdt=try\0" \
78 	"ip_dyn=yes\0" \
79 	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
80 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
81 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
82 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
83 	"mmcautodetect=yes\0" \
84 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
85 		"root=${mmcroot}\0" \
86 	"loadbootscript=" \
87 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
88 	"bootscript=echo Running bootscript from mmc ...; " \
89 		"source\0" \
90 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
91 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
92 	"mmcboot=echo Booting from mmc ...; " \
93 		"run mmcargs; " \
94 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
95 			"if run loadfdt; then " \
96 				"bootz ${loadaddr} - ${fdt_addr}; " \
97 			"else " \
98 				"if test ${boot_fdt} = try; then " \
99 					"bootz; " \
100 				"else " \
101 					"echo WARN: Cannot load the DT; " \
102 				"fi; " \
103 			"fi; " \
104 		"else " \
105 			"bootz; " \
106 		"fi;\0" \
107 	"netargs=setenv bootargs console=${console},${baudrate} " \
108 		"root=/dev/nfs " \
109 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
110 		"netboot=echo Booting from net ...; " \
111 		"run netargs; " \
112 		"if test ${ip_dyn} = yes; then " \
113 			"setenv get_cmd dhcp; " \
114 		"else " \
115 			"setenv get_cmd tftp; " \
116 		"fi; " \
117 		"${get_cmd} ${image}; " \
118 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
119 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
120 				"bootz ${loadaddr} - ${fdt_addr}; " \
121 			"else " \
122 				"if test ${boot_fdt} = try; then " \
123 					"bootz; " \
124 				"else " \
125 					"echo WARN: Cannot load the DT; " \
126 				"fi; " \
127 			"fi; " \
128 		"else " \
129 			"bootz; " \
130 		"fi;\0" \
131 		"findfdt="\
132 			"if test $fdt_file = undefined; then " \
133 				"if test $board_name = EVK && test $board_rev = 9X9; then " \
134 					"setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
135 				"if test $board_name = EVK && test $board_rev = 14X14; then " \
136 					"setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
137 				"if test $fdt_file = undefined; then " \
138 					"echo WARNING: Could not determine dtb to use; fi; " \
139 			"fi;\0" \
140 
141 #define CONFIG_BOOTCOMMAND \
142 	   "run findfdt;" \
143 	   "mmc dev ${mmcdev};" \
144 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
145 		   "if run loadbootscript; then " \
146 			   "run bootscript; " \
147 		   "else " \
148 			   "if run loadimage; then " \
149 				   "run mmcboot; " \
150 			   "else run netboot; " \
151 			   "fi; " \
152 		   "fi; " \
153 	   "else run netboot; fi"
154 
155 /* Miscellaneous configurable options */
156 #define CONFIG_SYS_MEMTEST_START	0x80000000
157 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
158 
159 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
160 #define CONFIG_SYS_HZ			1000
161 
162 #define CONFIG_CMDLINE_EDITING
163 #define CONFIG_STACKSIZE		SZ_128K
164 
165 /* Physical Memory Map */
166 #define CONFIG_NR_DRAM_BANKS		1
167 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
168 
169 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
170 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
171 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
172 
173 #define CONFIG_SYS_INIT_SP_OFFSET \
174 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
175 #define CONFIG_SYS_INIT_SP_ADDR \
176 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
177 
178 /* FLASH and environment organization */
179 #define CONFIG_SYS_NO_FLASH
180 
181 #define CONFIG_ENV_SIZE			SZ_8K
182 #define CONFIG_ENV_IS_IN_MMC
183 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
184 #define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
185 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
186 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
187 
188 #define CONFIG_CMD_BOOTZ
189 #define CONFIG_CMD_BMODE
190 
191 #ifndef CONFIG_SYS_DCACHE_OFF
192 #define CONFIG_CMD_CACHE
193 #endif
194 
195 #define CONFIG_FSL_QSPI
196 #ifdef CONFIG_FSL_QSPI
197 #define CONFIG_SPI_FLASH
198 #define CONFIG_SPI_FLASH_BAR
199 #define CONFIG_SF_DEFAULT_BUS		0
200 #define CONFIG_SF_DEFAULT_CS		0
201 #define CONFIG_SF_DEFAULT_SPEED	40000000
202 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
203 #define CONFIG_SPI_FLASH_STMICRO
204 #define FSL_QSPI_FLASH_NUM		1
205 #define FSL_QSPI_FLASH_SIZE		SZ_32M
206 #endif
207 
208 /* USB Configs */
209 #ifdef CONFIG_CMD_USB
210 #define CONFIG_USB_EHCI
211 #define CONFIG_USB_EHCI_MX6
212 #define CONFIG_USB_STORAGE
213 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
214 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
215 #define CONFIG_MXC_USB_FLAGS   0
216 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
217 #endif
218 
219 #ifdef CONFIG_CMD_NET
220 #define CONFIG_FEC_MXC
221 #define CONFIG_MII
222 #define CONFIG_FEC_ENET_DEV		1
223 
224 #if (CONFIG_FEC_ENET_DEV == 0)
225 #define IMX_FEC_BASE			ENET_BASE_ADDR
226 #define CONFIG_FEC_MXC_PHYADDR          0x2
227 #define CONFIG_FEC_XCV_TYPE             RMII
228 #elif (CONFIG_FEC_ENET_DEV == 1)
229 #define IMX_FEC_BASE			ENET2_BASE_ADDR
230 #define CONFIG_FEC_MXC_PHYADDR		0x1
231 #define CONFIG_FEC_XCV_TYPE		RMII
232 #endif
233 #define CONFIG_ETHPRIME			"FEC"
234 
235 #define CONFIG_PHYLIB
236 #define CONFIG_PHY_MICREL
237 #endif
238 
239 #define CONFIG_IMX_THERMAL
240 
241 #ifndef CONFIG_SPL_BUILD
242 #define CONFIG_VIDEO
243 #ifdef CONFIG_VIDEO
244 #define CONFIG_CFB_CONSOLE
245 #define CONFIG_VIDEO_MXS
246 #define CONFIG_VIDEO_LOGO
247 #define CONFIG_VIDEO_SW_CURSOR
248 #define CONFIG_VGA_AS_SINGLE_DEVICE
249 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
250 #define CONFIG_SPLASH_SCREEN
251 #define CONFIG_SPLASH_SCREEN_ALIGN
252 #define CONFIG_CMD_BMP
253 #define CONFIG_BMP_16BPP
254 #define CONFIG_VIDEO_BMP_RLE8
255 #define CONFIG_VIDEO_BMP_LOGO
256 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
257 #endif
258 #endif
259 
260 #endif
261