xref: /rk3399_rockchip-uboot/include/configs/mx6ul_14x14_evk.h (revision 77d2f7f5070c7def29d433096f4cee57eeddbd23)
1 /*
2  * Copyright (C) 2015 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
10 
11 #include <asm/arch/imx-regs.h>
12 #include <linux/sizes.h>
13 #include "mx6_common.h"
14 #include <asm/imx-common/gpio.h>
15 
16 #define is_mx6ul_9x9_evk()	CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
17 
18 /* SPL options */
19 #define CONFIG_SPL_MMC_SUPPORT
20 #include "imx6_spl.h"
21 
22 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
23 
24 #define CONFIG_DISPLAY_CPUINFO
25 #define CONFIG_DISPLAY_BOARDINFO
26 
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)
29 
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_BOARD_LATE_INIT
32 
33 #define CONFIG_MXC_UART
34 #define CONFIG_MXC_UART_BASE		UART1_BASE
35 
36 /* MMC Configs */
37 #ifdef CONFIG_FSL_USDHC
38 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
39 
40 /* NAND pin conflicts with usdhc2 */
41 #ifdef CONFIG_NAND_MXS
42 #define CONFIG_SYS_FSL_USDHC_NUM	1
43 #else
44 #define CONFIG_SYS_FSL_USDHC_NUM	2
45 #endif
46 
47 #endif
48 
49 /* I2C configs */
50 #ifdef CONFIG_CMD_I2C
51 #define CONFIG_SYS_I2C
52 #define CONFIG_SYS_I2C_MXC
53 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
54 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
55 #define CONFIG_SYS_I2C_SPEED		100000
56 
57 /* PMIC only for 9X9 EVK */
58 #define CONFIG_POWER
59 #define CONFIG_POWER_I2C
60 #define CONFIG_POWER_PFUZE3000
61 #define CONFIG_POWER_PFUZE3000_I2C_ADDR  0x08
62 #endif
63 
64 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
65 
66 #define CONFIG_EXTRA_ENV_SETTINGS \
67 	"script=boot.scr\0" \
68 	"image=zImage\0" \
69 	"console=ttymxc0\0" \
70 	"fdt_high=0xffffffff\0" \
71 	"initrd_high=0xffffffff\0" \
72 	"fdt_file=undefined\0" \
73 	"fdt_addr=0x83000000\0" \
74 	"boot_fdt=try\0" \
75 	"ip_dyn=yes\0" \
76 	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
77 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
78 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
79 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
80 	"mmcautodetect=yes\0" \
81 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
82 		"root=${mmcroot}\0" \
83 	"loadbootscript=" \
84 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
85 	"bootscript=echo Running bootscript from mmc ...; " \
86 		"source\0" \
87 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
88 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
89 	"mmcboot=echo Booting from mmc ...; " \
90 		"run mmcargs; " \
91 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
92 			"if run loadfdt; then " \
93 				"bootz ${loadaddr} - ${fdt_addr}; " \
94 			"else " \
95 				"if test ${boot_fdt} = try; then " \
96 					"bootz; " \
97 				"else " \
98 					"echo WARN: Cannot load the DT; " \
99 				"fi; " \
100 			"fi; " \
101 		"else " \
102 			"bootz; " \
103 		"fi;\0" \
104 	"netargs=setenv bootargs console=${console},${baudrate} " \
105 		"root=/dev/nfs " \
106 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
107 		"netboot=echo Booting from net ...; " \
108 		"run netargs; " \
109 		"if test ${ip_dyn} = yes; then " \
110 			"setenv get_cmd dhcp; " \
111 		"else " \
112 			"setenv get_cmd tftp; " \
113 		"fi; " \
114 		"${get_cmd} ${image}; " \
115 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
116 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
117 				"bootz ${loadaddr} - ${fdt_addr}; " \
118 			"else " \
119 				"if test ${boot_fdt} = try; then " \
120 					"bootz; " \
121 				"else " \
122 					"echo WARN: Cannot load the DT; " \
123 				"fi; " \
124 			"fi; " \
125 		"else " \
126 			"bootz; " \
127 		"fi;\0" \
128 		"findfdt="\
129 			"if test $fdt_file = undefined; then " \
130 				"if test $board_name = EVK && test $board_rev = 9X9; then " \
131 					"setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
132 				"if test $board_name = EVK && test $board_rev = 14X14; then " \
133 					"setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
134 				"if test $fdt_file = undefined; then " \
135 					"echo WARNING: Could not determine dtb to use; fi; " \
136 			"fi;\0" \
137 
138 #define CONFIG_BOOTCOMMAND \
139 	   "run findfdt;" \
140 	   "mmc dev ${mmcdev};" \
141 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
142 		   "if run loadbootscript; then " \
143 			   "run bootscript; " \
144 		   "else " \
145 			   "if run loadimage; then " \
146 				   "run mmcboot; " \
147 			   "else run netboot; " \
148 			   "fi; " \
149 		   "fi; " \
150 	   "else run netboot; fi"
151 
152 /* Miscellaneous configurable options */
153 #define CONFIG_SYS_MEMTEST_START	0x80000000
154 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
155 
156 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
157 #define CONFIG_SYS_HZ			1000
158 
159 #define CONFIG_CMDLINE_EDITING
160 #define CONFIG_STACKSIZE		SZ_128K
161 
162 /* Physical Memory Map */
163 #define CONFIG_NR_DRAM_BANKS		1
164 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
165 
166 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
167 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
168 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
169 
170 #define CONFIG_SYS_INIT_SP_OFFSET \
171 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
172 #define CONFIG_SYS_INIT_SP_ADDR \
173 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
174 
175 /* FLASH and environment organization */
176 #define CONFIG_SYS_NO_FLASH
177 
178 #define CONFIG_ENV_SIZE			SZ_8K
179 #define CONFIG_ENV_IS_IN_MMC
180 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
181 #define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
182 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
183 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
184 
185 #define CONFIG_CMD_BMODE
186 
187 #ifndef CONFIG_SYS_DCACHE_OFF
188 #endif
189 
190 #define CONFIG_FSL_QSPI
191 #ifdef CONFIG_FSL_QSPI
192 #define CONFIG_SPI_FLASH
193 #define CONFIG_SPI_FLASH_BAR
194 #define CONFIG_SF_DEFAULT_BUS		0
195 #define CONFIG_SF_DEFAULT_CS		0
196 #define CONFIG_SF_DEFAULT_SPEED	40000000
197 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
198 #define CONFIG_SPI_FLASH_STMICRO
199 #define FSL_QSPI_FLASH_NUM		1
200 #define FSL_QSPI_FLASH_SIZE		SZ_32M
201 #endif
202 
203 /* USB Configs */
204 #ifdef CONFIG_CMD_USB
205 #define CONFIG_USB_EHCI
206 #define CONFIG_USB_EHCI_MX6
207 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
208 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
209 #define CONFIG_MXC_USB_FLAGS   0
210 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
211 #endif
212 
213 #ifdef CONFIG_CMD_NET
214 #define CONFIG_FEC_MXC
215 #define CONFIG_MII
216 #define CONFIG_FEC_ENET_DEV		1
217 
218 #if (CONFIG_FEC_ENET_DEV == 0)
219 #define IMX_FEC_BASE			ENET_BASE_ADDR
220 #define CONFIG_FEC_MXC_PHYADDR          0x2
221 #define CONFIG_FEC_XCV_TYPE             RMII
222 #elif (CONFIG_FEC_ENET_DEV == 1)
223 #define IMX_FEC_BASE			ENET2_BASE_ADDR
224 #define CONFIG_FEC_MXC_PHYADDR		0x1
225 #define CONFIG_FEC_XCV_TYPE		RMII
226 #endif
227 #define CONFIG_ETHPRIME			"FEC"
228 
229 #define CONFIG_PHYLIB
230 #define CONFIG_PHY_MICREL
231 #endif
232 
233 #define CONFIG_IMX_THERMAL
234 
235 #ifndef CONFIG_SPL_BUILD
236 #define CONFIG_VIDEO
237 #ifdef CONFIG_VIDEO
238 #define CONFIG_CFB_CONSOLE
239 #define CONFIG_VIDEO_MXS
240 #define CONFIG_VIDEO_LOGO
241 #define CONFIG_VIDEO_SW_CURSOR
242 #define CONFIG_VGA_AS_SINGLE_DEVICE
243 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
244 #define CONFIG_SPLASH_SCREEN
245 #define CONFIG_SPLASH_SCREEN_ALIGN
246 #define CONFIG_CMD_BMP
247 #define CONFIG_BMP_16BPP
248 #define CONFIG_VIDEO_BMP_RLE8
249 #define CONFIG_VIDEO_BMP_LOGO
250 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
251 #endif
252 #endif
253 
254 #endif
255