1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SX Sabresd board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #include "mx6_common.h" 14 15 #ifdef CONFIG_SPL 16 #define CONFIG_SPL_LIBCOMMON_SUPPORT 17 #define CONFIG_SPL_MMC_SUPPORT 18 #include "imx6_spl.h" 19 #endif 20 21 /* Size of malloc() pool */ 22 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 23 24 #define CONFIG_BOARD_EARLY_INIT_F 25 #define CONFIG_MXC_GPIO 26 27 #define CONFIG_MXC_UART 28 #define CONFIG_MXC_UART_BASE UART1_BASE 29 30 /* allow to overwrite serial and ethaddr */ 31 #define CONFIG_ENV_OVERWRITE 32 #define CONFIG_CONS_INDEX 1 33 #define CONFIG_BAUDRATE 115200 34 35 /* Command definition */ 36 37 #define CONFIG_BOOTDELAY 3 38 39 #define CONFIG_LOADADDR 0x80800000 40 #define CONFIG_SYS_TEXT_BASE 0x87800000 41 42 #define CONFIG_EXTRA_ENV_SETTINGS \ 43 "script=boot.scr\0" \ 44 "image=zImage\0" \ 45 "console=ttymxc0\0" \ 46 "fdt_high=0xffffffff\0" \ 47 "initrd_high=0xffffffff\0" \ 48 "fdt_file=imx6sx-sdb.dtb\0" \ 49 "fdt_addr=0x88000000\0" \ 50 "boot_fdt=try\0" \ 51 "ip_dyn=yes\0" \ 52 "mmcdev=2\0" \ 53 "mmcpart=1\0" \ 54 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 55 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 56 "root=${mmcroot}\0" \ 57 "loadbootscript=" \ 58 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 59 "bootscript=echo Running bootscript from mmc ...; " \ 60 "source\0" \ 61 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 62 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 63 "mmcboot=echo Booting from mmc ...; " \ 64 "run mmcargs; " \ 65 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 66 "if run loadfdt; then " \ 67 "bootz ${loadaddr} - ${fdt_addr}; " \ 68 "else " \ 69 "if test ${boot_fdt} = try; then " \ 70 "bootz; " \ 71 "else " \ 72 "echo WARN: Cannot load the DT; " \ 73 "fi; " \ 74 "fi; " \ 75 "else " \ 76 "bootz; " \ 77 "fi;\0" \ 78 "netargs=setenv bootargs console=${console},${baudrate} " \ 79 "root=/dev/nfs " \ 80 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 81 "netboot=echo Booting from net ...; " \ 82 "run netargs; " \ 83 "if test ${ip_dyn} = yes; then " \ 84 "setenv get_cmd dhcp; " \ 85 "else " \ 86 "setenv get_cmd tftp; " \ 87 "fi; " \ 88 "${get_cmd} ${image}; " \ 89 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 90 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 91 "bootz ${loadaddr} - ${fdt_addr}; " \ 92 "else " \ 93 "if test ${boot_fdt} = try; then " \ 94 "bootz; " \ 95 "else " \ 96 "echo WARN: Cannot load the DT; " \ 97 "fi; " \ 98 "fi; " \ 99 "else " \ 100 "bootz; " \ 101 "fi;\0" 102 103 #define CONFIG_BOOTCOMMAND \ 104 "mmc dev ${mmcdev};" \ 105 "mmc dev ${mmcdev}; if mmc rescan; then " \ 106 "if run loadbootscript; then " \ 107 "run bootscript; " \ 108 "else " \ 109 "if run loadimage; then " \ 110 "run mmcboot; " \ 111 "else run netboot; " \ 112 "fi; " \ 113 "fi; " \ 114 "else run netboot; fi" 115 116 /* Miscellaneous configurable options */ 117 #define CONFIG_SYS_LONGHELP 118 #define CONFIG_SYS_HUSH_PARSER 119 #define CONFIG_AUTO_COMPLETE 120 #define CONFIG_SYS_CBSIZE 1024 121 122 #define CONFIG_SYS_MAXARGS 256 123 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 124 125 #define CONFIG_SYS_MEMTEST_START 0x80000000 126 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) 127 128 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 129 130 #define CONFIG_CMDLINE_EDITING 131 #define CONFIG_STACKSIZE SZ_128K 132 133 /* Physical Memory Map */ 134 #define CONFIG_NR_DRAM_BANKS 1 135 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 136 #define PHYS_SDRAM_SIZE SZ_1G 137 138 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 139 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 140 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 141 142 #define CONFIG_SYS_INIT_SP_OFFSET \ 143 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 144 #define CONFIG_SYS_INIT_SP_ADDR \ 145 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 146 147 /* MMC Configuration */ 148 #define CONFIG_FSL_ESDHC 149 #define CONFIG_FSL_USDHC 150 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 151 152 #define CONFIG_MMC 153 #define CONFIG_CMD_MMC 154 #define CONFIG_GENERIC_MMC 155 #define CONFIG_BOUNCE_BUFFER 156 #define CONFIG_CMD_EXT2 157 #define CONFIG_CMD_FAT 158 #define CONFIG_DOS_PARTITION 159 160 /* I2C Configs */ 161 #define CONFIG_CMD_I2C 162 #define CONFIG_SYS_I2C 163 #define CONFIG_SYS_I2C_MXC 164 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 165 #define CONFIG_SYS_I2C_SPEED 100000 166 167 /* PMIC */ 168 #define CONFIG_POWER 169 #define CONFIG_POWER_I2C 170 #define CONFIG_POWER_PFUZE100 171 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 172 173 /* Network */ 174 #define CONFIG_CMD_PING 175 #define CONFIG_CMD_DHCP 176 #define CONFIG_CMD_MII 177 #define CONFIG_CMD_NET 178 #define CONFIG_FEC_MXC 179 #define CONFIG_MII 180 181 #define IMX_FEC_BASE ENET_BASE_ADDR 182 #define CONFIG_FEC_MXC_PHYADDR 0x1 183 184 #define CONFIG_FEC_XCV_TYPE RGMII 185 #define CONFIG_ETHPRIME "FEC" 186 187 #define CONFIG_PHYLIB 188 #define CONFIG_PHY_ATHEROS 189 190 191 #define CONFIG_CMD_USB 192 #ifdef CONFIG_CMD_USB 193 #define CONFIG_USB_EHCI 194 #define CONFIG_USB_EHCI_MX6 195 #define CONFIG_USB_STORAGE 196 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 197 #define CONFIG_USB_HOST_ETHER 198 #define CONFIG_USB_ETHER_ASIX 199 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 200 #define CONFIG_MXC_USB_FLAGS 0 201 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 202 #endif 203 204 #define CONFIG_CMD_PCI 205 #ifdef CONFIG_CMD_PCI 206 #define CONFIG_PCI 207 #define CONFIG_PCI_PNP 208 #define CONFIG_PCI_SCAN_SHOW 209 #define CONFIG_PCIE_IMX 210 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) 211 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) 212 #endif 213 214 #define CONFIG_IMX6_THERMAL 215 216 #define CONFIG_CMD_FUSE 217 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) 218 #define CONFIG_MXC_OCOTP 219 #endif 220 221 #define CONFIG_CMD_TIME 222 223 #define CONFIG_FSL_QSPI 224 225 #ifdef CONFIG_FSL_QSPI 226 #define CONFIG_CMD_SF 227 #define CONFIG_SPI_FLASH 228 #define CONFIG_SPI_FLASH_BAR 229 #define CONFIG_SPI_FLASH_SPANSION 230 #define CONFIG_SPI_FLASH_STMICRO 231 #define CONFIG_SYS_FSL_QSPI_LE 232 #define CONFIG_SYS_FSL_QSPI_AHB 233 #ifdef CONFIG_MX6SX_SABRESD_REVA 234 #define FSL_QSPI_FLASH_SIZE SZ_16M 235 #else 236 #define FSL_QSPI_FLASH_SIZE SZ_32M 237 #endif 238 #define FSL_QSPI_FLASH_NUM 2 239 #endif 240 241 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 242 #define CONFIG_ENV_SIZE SZ_8K 243 #define CONFIG_ENV_IS_IN_MMC 244 245 #define CONFIG_OF_LIBFDT 246 #define CONFIG_CMD_BOOTZ 247 248 #ifndef CONFIG_SYS_DCACHE_OFF 249 #define CONFIG_CMD_CACHE 250 #endif 251 252 #define CONFIG_SYS_FSL_USDHC_NUM 3 253 #if defined(CONFIG_ENV_IS_IN_MMC) 254 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ 255 #endif 256 257 #endif /* __CONFIG_H */ 258