1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SX Sabresd board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #include <asm/arch/imx-regs.h> 14 #include <linux/sizes.h> 15 #include "mx6_common.h" 16 17 #define CONFIG_MX6 18 #define CONFIG_DISPLAY_CPUINFO 19 #define CONFIG_DISPLAY_BOARDINFO 20 21 #define CONFIG_CMDLINE_TAG 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 #define CONFIG_REVISION_TAG 25 #define CONFIG_SYS_GENERIC_BOARD 26 27 /* Size of malloc() pool */ 28 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 29 30 #define CONFIG_BOARD_EARLY_INIT_F 31 #define CONFIG_MXC_GPIO 32 33 #define CONFIG_MXC_UART 34 #define CONFIG_MXC_UART_BASE UART1_BASE 35 36 /* allow to overwrite serial and ethaddr */ 37 #define CONFIG_ENV_OVERWRITE 38 #define CONFIG_CONS_INDEX 1 39 #define CONFIG_BAUDRATE 115200 40 41 /* Command definition */ 42 #include <config_cmd_default.h> 43 44 #undef CONFIG_CMD_IMLS 45 46 #define CONFIG_BOOTDELAY 3 47 48 #define CONFIG_LOADADDR 0x80800000 49 #define CONFIG_SYS_TEXT_BASE 0x87800000 50 51 #define CONFIG_EXTRA_ENV_SETTINGS \ 52 "script=boot.scr\0" \ 53 "image=zImage\0" \ 54 "console=ttymxc0\0" \ 55 "fdt_high=0xffffffff\0" \ 56 "initrd_high=0xffffffff\0" \ 57 "fdt_file=imx6sx-sdb.dtb\0" \ 58 "fdt_addr=0x88000000\0" \ 59 "boot_fdt=try\0" \ 60 "ip_dyn=yes\0" \ 61 "mmcdev=2\0" \ 62 "mmcpart=1\0" \ 63 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 64 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 65 "root=${mmcroot}\0" \ 66 "loadbootscript=" \ 67 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 68 "bootscript=echo Running bootscript from mmc ...; " \ 69 "source\0" \ 70 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 71 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 72 "mmcboot=echo Booting from mmc ...; " \ 73 "run mmcargs; " \ 74 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 75 "if run loadfdt; then " \ 76 "bootz ${loadaddr} - ${fdt_addr}; " \ 77 "else " \ 78 "if test ${boot_fdt} = try; then " \ 79 "bootz; " \ 80 "else " \ 81 "echo WARN: Cannot load the DT; " \ 82 "fi; " \ 83 "fi; " \ 84 "else " \ 85 "bootz; " \ 86 "fi;\0" \ 87 "netargs=setenv bootargs console=${console},${baudrate} " \ 88 "root=/dev/nfs " \ 89 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 90 "netboot=echo Booting from net ...; " \ 91 "run netargs; " \ 92 "if test ${ip_dyn} = yes; then " \ 93 "setenv get_cmd dhcp; " \ 94 "else " \ 95 "setenv get_cmd tftp; " \ 96 "fi; " \ 97 "${get_cmd} ${image}; " \ 98 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 99 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 100 "bootz ${loadaddr} - ${fdt_addr}; " \ 101 "else " \ 102 "if test ${boot_fdt} = try; then " \ 103 "bootz; " \ 104 "else " \ 105 "echo WARN: Cannot load the DT; " \ 106 "fi; " \ 107 "fi; " \ 108 "else " \ 109 "bootz; " \ 110 "fi;\0" 111 112 #define CONFIG_BOOTCOMMAND \ 113 "mmc dev ${mmcdev};" \ 114 "mmc dev ${mmcdev}; if mmc rescan; then " \ 115 "if run loadbootscript; then " \ 116 "run bootscript; " \ 117 "else " \ 118 "if run loadimage; then " \ 119 "run mmcboot; " \ 120 "else run netboot; " \ 121 "fi; " \ 122 "fi; " \ 123 "else run netboot; fi" 124 125 /* Miscellaneous configurable options */ 126 #define CONFIG_SYS_LONGHELP 127 #define CONFIG_SYS_HUSH_PARSER 128 #define CONFIG_AUTO_COMPLETE 129 #define CONFIG_SYS_CBSIZE 1024 130 131 /* Print Buffer Size */ 132 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 133 #define CONFIG_SYS_MAXARGS 256 134 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 135 136 #define CONFIG_SYS_MEMTEST_START 0x80000000 137 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) 138 139 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 140 141 #define CONFIG_CMDLINE_EDITING 142 #define CONFIG_STACKSIZE SZ_128K 143 144 /* Physical Memory Map */ 145 #define CONFIG_NR_DRAM_BANKS 1 146 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 147 #define PHYS_SDRAM_SIZE SZ_1G 148 149 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 150 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 151 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 152 153 #define CONFIG_SYS_INIT_SP_OFFSET \ 154 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 155 #define CONFIG_SYS_INIT_SP_ADDR \ 156 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 157 158 /* MMC Configuration */ 159 #define CONFIG_FSL_ESDHC 160 #define CONFIG_FSL_USDHC 161 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 162 163 #define CONFIG_MMC 164 #define CONFIG_CMD_MMC 165 #define CONFIG_GENERIC_MMC 166 #define CONFIG_BOUNCE_BUFFER 167 #define CONFIG_CMD_EXT2 168 #define CONFIG_CMD_FAT 169 #define CONFIG_DOS_PARTITION 170 171 /* I2C Configs */ 172 #define CONFIG_CMD_I2C 173 #define CONFIG_SYS_I2C 174 #define CONFIG_SYS_I2C_MXC 175 #define CONFIG_SYS_I2C_SPEED 100000 176 177 /* PMIC */ 178 #define CONFIG_POWER 179 #define CONFIG_POWER_I2C 180 #define CONFIG_POWER_PFUZE100 181 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 182 183 /* Network */ 184 #define CONFIG_CMD_PING 185 #define CONFIG_CMD_DHCP 186 #define CONFIG_CMD_MII 187 #define CONFIG_CMD_NET 188 #define CONFIG_FEC_MXC 189 #define CONFIG_MII 190 191 #define IMX_FEC_BASE ENET_BASE_ADDR 192 #define CONFIG_FEC_MXC_PHYADDR 0x1 193 194 #define CONFIG_FEC_XCV_TYPE RGMII 195 #define CONFIG_ETHPRIME "FEC" 196 197 #define CONFIG_PHYLIB 198 #define CONFIG_PHY_ATHEROS 199 200 201 #define CONFIG_CMD_USB 202 #ifdef CONFIG_CMD_USB 203 #define CONFIG_USB_EHCI 204 #define CONFIG_USB_EHCI_MX6 205 #define CONFIG_USB_STORAGE 206 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 207 #define CONFIG_USB_HOST_ETHER 208 #define CONFIG_USB_ETHER_ASIX 209 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 210 #define CONFIG_MXC_USB_FLAGS 0 211 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 212 #endif 213 214 #define CONFIG_CMD_PCI 215 #ifdef CONFIG_CMD_PCI 216 #define CONFIG_PCI 217 #define CONFIG_PCI_PNP 218 #define CONFIG_PCI_SCAN_SHOW 219 #define CONFIG_PCIE_IMX 220 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) 221 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) 222 #endif 223 224 #define CONFIG_DM 225 #define CONFIG_DM_THERMAL 226 #define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 227 #define CONFIG_IMX6_THERMAL 228 229 #define CONFIG_CMD_FUSE 230 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) 231 #define CONFIG_MXC_OCOTP 232 #endif 233 234 /* FLASH and environment organization */ 235 #define CONFIG_SYS_NO_FLASH 236 237 #define CONFIG_CMD_TIME 238 239 #define CONFIG_FSL_QSPI 240 241 #ifdef CONFIG_FSL_QSPI 242 #define CONFIG_CMD_SF 243 #define CONFIG_SPI_FLASH 244 #define CONFIG_SPI_FLASH_BAR 245 #define CONFIG_SPI_FLASH_SPANSION 246 #define CONFIG_SPI_FLASH_STMICRO 247 #define CONFIG_SYS_FSL_QSPI_LE 248 #define CONFIG_SYS_FSL_QSPI_AHB 249 #ifdef CONFIG_MX6SX_SABRESD_REVA 250 #define FSL_QSPI_FLASH_SIZE SZ_16M 251 #else 252 #define FSL_QSPI_FLASH_SIZE SZ_32M 253 #endif 254 #define FSL_QSPI_FLASH_NUM 2 255 #endif 256 257 #define CONFIG_ENV_OFFSET (6 * SZ_64K) 258 #define CONFIG_ENV_SIZE SZ_8K 259 #define CONFIG_ENV_IS_IN_MMC 260 261 #define CONFIG_OF_LIBFDT 262 #define CONFIG_CMD_BOOTZ 263 264 #ifndef CONFIG_SYS_DCACHE_OFF 265 #define CONFIG_CMD_CACHE 266 #endif 267 268 #define CONFIG_SYS_FSL_USDHC_NUM 3 269 #if defined(CONFIG_ENV_IS_IN_MMC) 270 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ 271 #endif 272 273 #endif /* __CONFIG_H */ 274