1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6SX Sabresd board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #include "mx6_common.h" 14 15 #ifdef CONFIG_SPL 16 #define CONFIG_SPL_LIBCOMMON_SUPPORT 17 #define CONFIG_SPL_MMC_SUPPORT 18 #include "imx6_spl.h" 19 #endif 20 21 /* Size of malloc() pool */ 22 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 23 24 #define CONFIG_BOARD_EARLY_INIT_F 25 26 #define CONFIG_MXC_UART 27 #define CONFIG_MXC_UART_BASE UART1_BASE 28 29 /* allow to overwrite serial and ethaddr */ 30 #define CONFIG_ENV_OVERWRITE 31 #define CONFIG_CONS_INDEX 1 32 #define CONFIG_BAUDRATE 115200 33 34 /* Command definition */ 35 36 #define CONFIG_BOOTDELAY 3 37 38 #define CONFIG_LOADADDR 0x80800000 39 #define CONFIG_SYS_TEXT_BASE 0x87800000 40 41 #define CONFIG_EXTRA_ENV_SETTINGS \ 42 "script=boot.scr\0" \ 43 "image=zImage\0" \ 44 "console=ttymxc0\0" \ 45 "fdt_high=0xffffffff\0" \ 46 "initrd_high=0xffffffff\0" \ 47 "fdt_file=imx6sx-sdb.dtb\0" \ 48 "fdt_addr=0x88000000\0" \ 49 "boot_fdt=try\0" \ 50 "ip_dyn=yes\0" \ 51 "mmcdev=2\0" \ 52 "mmcpart=1\0" \ 53 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 54 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 55 "root=${mmcroot}\0" \ 56 "loadbootscript=" \ 57 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 58 "bootscript=echo Running bootscript from mmc ...; " \ 59 "source\0" \ 60 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 61 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 62 "mmcboot=echo Booting from mmc ...; " \ 63 "run mmcargs; " \ 64 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 65 "if run loadfdt; then " \ 66 "bootz ${loadaddr} - ${fdt_addr}; " \ 67 "else " \ 68 "if test ${boot_fdt} = try; then " \ 69 "bootz; " \ 70 "else " \ 71 "echo WARN: Cannot load the DT; " \ 72 "fi; " \ 73 "fi; " \ 74 "else " \ 75 "bootz; " \ 76 "fi;\0" \ 77 "netargs=setenv bootargs console=${console},${baudrate} " \ 78 "root=/dev/nfs " \ 79 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 80 "netboot=echo Booting from net ...; " \ 81 "run netargs; " \ 82 "if test ${ip_dyn} = yes; then " \ 83 "setenv get_cmd dhcp; " \ 84 "else " \ 85 "setenv get_cmd tftp; " \ 86 "fi; " \ 87 "${get_cmd} ${image}; " \ 88 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 89 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 90 "bootz ${loadaddr} - ${fdt_addr}; " \ 91 "else " \ 92 "if test ${boot_fdt} = try; then " \ 93 "bootz; " \ 94 "else " \ 95 "echo WARN: Cannot load the DT; " \ 96 "fi; " \ 97 "fi; " \ 98 "else " \ 99 "bootz; " \ 100 "fi;\0" 101 102 #define CONFIG_BOOTCOMMAND \ 103 "mmc dev ${mmcdev};" \ 104 "mmc dev ${mmcdev}; if mmc rescan; then " \ 105 "if run loadbootscript; then " \ 106 "run bootscript; " \ 107 "else " \ 108 "if run loadimage; then " \ 109 "run mmcboot; " \ 110 "else run netboot; " \ 111 "fi; " \ 112 "fi; " \ 113 "else run netboot; fi" 114 115 /* Miscellaneous configurable options */ 116 #define CONFIG_SYS_LONGHELP 117 #define CONFIG_SYS_HUSH_PARSER 118 #define CONFIG_AUTO_COMPLETE 119 #define CONFIG_SYS_CBSIZE 1024 120 121 #define CONFIG_SYS_MAXARGS 256 122 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 123 124 #define CONFIG_SYS_MEMTEST_START 0x80000000 125 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) 126 127 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 128 129 #define CONFIG_CMDLINE_EDITING 130 #define CONFIG_STACKSIZE SZ_128K 131 132 /* Physical Memory Map */ 133 #define CONFIG_NR_DRAM_BANKS 1 134 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 135 #define PHYS_SDRAM_SIZE SZ_1G 136 137 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 138 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 139 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 140 141 #define CONFIG_SYS_INIT_SP_OFFSET \ 142 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 143 #define CONFIG_SYS_INIT_SP_ADDR \ 144 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 145 146 /* MMC Configuration */ 147 #define CONFIG_FSL_ESDHC 148 #define CONFIG_FSL_USDHC 149 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 150 151 #define CONFIG_MMC 152 #define CONFIG_CMD_MMC 153 #define CONFIG_GENERIC_MMC 154 #define CONFIG_BOUNCE_BUFFER 155 #define CONFIG_CMD_EXT2 156 #define CONFIG_CMD_FAT 157 #define CONFIG_DOS_PARTITION 158 159 /* I2C Configs */ 160 #define CONFIG_CMD_I2C 161 #define CONFIG_SYS_I2C 162 #define CONFIG_SYS_I2C_MXC 163 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 164 #define CONFIG_SYS_I2C_SPEED 100000 165 166 /* PMIC */ 167 #define CONFIG_POWER 168 #define CONFIG_POWER_I2C 169 #define CONFIG_POWER_PFUZE100 170 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 171 172 /* Network */ 173 #define CONFIG_CMD_PING 174 #define CONFIG_CMD_DHCP 175 #define CONFIG_CMD_MII 176 #define CONFIG_CMD_NET 177 #define CONFIG_FEC_MXC 178 #define CONFIG_MII 179 180 #define IMX_FEC_BASE ENET_BASE_ADDR 181 #define CONFIG_FEC_MXC_PHYADDR 0x1 182 183 #define CONFIG_FEC_XCV_TYPE RGMII 184 #define CONFIG_ETHPRIME "FEC" 185 186 #define CONFIG_PHYLIB 187 #define CONFIG_PHY_ATHEROS 188 189 190 #define CONFIG_CMD_USB 191 #ifdef CONFIG_CMD_USB 192 #define CONFIG_USB_EHCI 193 #define CONFIG_USB_EHCI_MX6 194 #define CONFIG_USB_STORAGE 195 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 196 #define CONFIG_USB_HOST_ETHER 197 #define CONFIG_USB_ETHER_ASIX 198 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 199 #define CONFIG_MXC_USB_FLAGS 0 200 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 201 #endif 202 203 #define CONFIG_CMD_PCI 204 #ifdef CONFIG_CMD_PCI 205 #define CONFIG_PCI 206 #define CONFIG_PCI_PNP 207 #define CONFIG_PCI_SCAN_SHOW 208 #define CONFIG_PCIE_IMX 209 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) 210 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) 211 #endif 212 213 #define CONFIG_IMX6_THERMAL 214 215 #define CONFIG_CMD_FUSE 216 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) 217 #define CONFIG_MXC_OCOTP 218 #endif 219 220 #define CONFIG_CMD_TIME 221 222 #define CONFIG_FSL_QSPI 223 224 #ifdef CONFIG_FSL_QSPI 225 #define CONFIG_CMD_SF 226 #define CONFIG_SPI_FLASH 227 #define CONFIG_SPI_FLASH_BAR 228 #define CONFIG_SPI_FLASH_SPANSION 229 #define CONFIG_SPI_FLASH_STMICRO 230 #define CONFIG_SYS_FSL_QSPI_LE 231 #define CONFIG_SYS_FSL_QSPI_AHB 232 #ifdef CONFIG_MX6SX_SABRESD_REVA 233 #define FSL_QSPI_FLASH_SIZE SZ_16M 234 #else 235 #define FSL_QSPI_FLASH_SIZE SZ_32M 236 #endif 237 #define FSL_QSPI_FLASH_NUM 2 238 #endif 239 240 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 241 #define CONFIG_ENV_SIZE SZ_8K 242 #define CONFIG_ENV_IS_IN_MMC 243 244 #define CONFIG_OF_LIBFDT 245 #define CONFIG_CMD_BOOTZ 246 247 #ifndef CONFIG_SYS_DCACHE_OFF 248 #define CONFIG_CMD_CACHE 249 #endif 250 251 #define CONFIG_SYS_FSL_USDHC_NUM 3 252 #if defined(CONFIG_ENV_IS_IN_MMC) 253 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/ 254 #endif 255 256 #endif /* __CONFIG_H */ 257