xref: /rk3399_rockchip-uboot/include/configs/mx6slevk.h (revision 77d2f7f5070c7def29d433096f4cee57eeddbd23)
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SL EVK board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 #ifdef CONFIG_SPL
15 #define CONFIG_SPL_MMC_SUPPORT
16 #include "imx6_spl.h"
17 #endif
18 
19 #define MACH_TYPE_MX6SLEVK		4307
20 #define CONFIG_MACH_TYPE		MACH_TYPE_MX6SLEVK
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
24 
25 #define CONFIG_BOARD_EARLY_INIT_F
26 
27 #define CONFIG_MXC_UART
28 #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
29 
30 /* MMC Configs */
31 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
32 
33 /* I2C Configs */
34 #define CONFIG_SYS_I2C
35 #define CONFIG_SYS_I2C_MXC
36 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
37 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
38 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
39 #define CONFIG_SYS_I2C_SPEED		  100000
40 
41 /* PMIC */
42 #define CONFIG_POWER
43 #define CONFIG_POWER_I2C
44 #define CONFIG_POWER_PFUZE100
45 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
46 
47 #define CONFIG_FEC_MXC
48 #define CONFIG_MII
49 #define IMX_FEC_BASE			ENET_BASE_ADDR
50 #define CONFIG_FEC_XCV_TYPE		RMII
51 #define CONFIG_FEC_MXC_PHYADDR		0
52 
53 #define CONFIG_PHYLIB
54 #define CONFIG_PHY_SMSC
55 
56 #define CONFIG_EXTRA_ENV_SETTINGS \
57 	"script=boot.scr\0" \
58 	"image=zImage\0" \
59 	"console=ttymxc0\0" \
60 	"fdt_high=0xffffffff\0" \
61 	"initrd_high=0xffffffff\0" \
62 	"fdt_file=imx6sl-evk.dtb\0" \
63 	"fdt_addr=0x88000000\0" \
64 	"boot_fdt=try\0" \
65 	"ip_dyn=yes\0" \
66 	"mmcdev=1\0" \
67 	"mmcpart=1\0" \
68 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
69 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
70 		"root=${mmcroot}\0" \
71 	"loadbootscript=" \
72 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
73 	"bootscript=echo Running bootscript from mmc ...; " \
74 		"source\0" \
75 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
76 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
77 	"mmcboot=echo Booting from mmc ...; " \
78 		"run mmcargs; " \
79 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
80 			"if run loadfdt; then " \
81 				"bootz ${loadaddr} - ${fdt_addr}; " \
82 			"else " \
83 				"if test ${boot_fdt} = try; then " \
84 					"bootz; " \
85 				"else " \
86 					"echo WARN: Cannot load the DT; " \
87 				"fi; " \
88 			"fi; " \
89 		"else " \
90 			"bootz; " \
91 		"fi;\0" \
92 	"netargs=setenv bootargs console=${console},${baudrate} " \
93 		"root=/dev/nfs " \
94 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
95 		"netboot=echo Booting from net ...; " \
96 		"run netargs; " \
97 		"if test ${ip_dyn} = yes; then " \
98 			"setenv get_cmd dhcp; " \
99 		"else " \
100 			"setenv get_cmd tftp; " \
101 		"fi; " \
102 		"${get_cmd} ${image}; " \
103 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
104 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
105 				"bootz ${loadaddr} - ${fdt_addr}; " \
106 			"else " \
107 				"if test ${boot_fdt} = try; then " \
108 					"bootz; " \
109 				"else " \
110 					"echo WARN: Cannot load the DT; " \
111 				"fi; " \
112 			"fi; " \
113 		"else " \
114 			"bootz; " \
115 		"fi;\0"
116 
117 #define CONFIG_BOOTCOMMAND \
118 	   "mmc dev ${mmcdev};" \
119 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
120 		   "if run loadbootscript; then " \
121 			   "run bootscript; " \
122 		   "else " \
123 			   "if run loadimage; then " \
124 				   "run mmcboot; " \
125 			   "else run netboot; " \
126 			   "fi; " \
127 		   "fi; " \
128 	   "else run netboot; fi"
129 
130 /* Miscellaneous configurable options */
131 #define CONFIG_SYS_MEMTEST_START	0x80000000
132 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)
133 
134 #define CONFIG_STACKSIZE		SZ_128K
135 
136 /* Physical Memory Map */
137 #define CONFIG_NR_DRAM_BANKS		1
138 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
139 
140 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
141 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
142 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
143 
144 #define CONFIG_SYS_INIT_SP_OFFSET \
145 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
146 #define CONFIG_SYS_INIT_SP_ADDR \
147 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
148 
149 /* Environment organization */
150 #define CONFIG_ENV_SIZE			SZ_8K
151 
152 #if defined CONFIG_SYS_BOOT_SPINOR
153 #define CONFIG_ENV_IS_IN_SPI_FLASH
154 #define CONFIG_ENV_OFFSET               (768 * 1024)
155 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
156 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
157 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
158 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
159 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
160 #else
161 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
162 #define CONFIG_ENV_IS_IN_MMC
163 #endif
164 
165 #ifdef CONFIG_CMD_SF
166 #define CONFIG_MXC_SPI
167 #define CONFIG_SF_DEFAULT_BUS		0
168 #define CONFIG_SF_DEFAULT_CS		0
169 #define CONFIG_SF_DEFAULT_SPEED		20000000
170 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
171 #endif
172 
173 /* USB Configs */
174 #ifdef CONFIG_CMD_USB
175 #define CONFIG_USB_EHCI
176 #define CONFIG_USB_EHCI_MX6
177 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
178 #define CONFIG_USB_HOST_ETHER
179 #define CONFIG_USB_ETHER_ASIX
180 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
181 #define CONFIG_MXC_USB_FLAGS		0
182 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
183 #endif
184 
185 #define CONFIG_SYS_FSL_USDHC_NUM	3
186 #if defined(CONFIG_ENV_IS_IN_MMC)
187 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC2*/
188 #endif
189 
190 #define CONFIG_IMX_THERMAL
191 
192 #endif				/* __CONFIG_H */
193