1 /* 2 * Copyright (C) 2012 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the Freescale i.MX6Q SabreSD board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MX6QSABRESD_CONFIG_H 10 #define __MX6QSABRESD_CONFIG_H 11 12 #ifdef CONFIG_SPL 13 #define CONFIG_SPL_MMC_SUPPORT 14 #include "imx6_spl.h" 15 #endif 16 17 #define CONFIG_MACH_TYPE 3980 18 #define CONFIG_MXC_UART_BASE UART1_BASE 19 #define CONFIG_CONSOLE_DEV "ttymxc0" 20 #define CONFIG_MMCROOT "/dev/mmcblk1p2" 21 22 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 23 24 #include "mx6sabre_common.h" 25 26 #define CONFIG_SYS_FSL_USDHC_NUM 3 27 #if defined(CONFIG_ENV_IS_IN_MMC) 28 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ 29 #endif 30 31 #define CONFIG_CMD_PCI 32 #ifdef CONFIG_CMD_PCI 33 #define CONFIG_PCI 34 #define CONFIG_PCI_PNP 35 #define CONFIG_PCI_SCAN_SHOW 36 #define CONFIG_PCIE_IMX 37 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 38 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) 39 #endif 40 41 /* I2C Configs */ 42 #define CONFIG_SYS_I2C 43 #define CONFIG_SYS_I2C_MXC 44 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 45 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 46 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 47 #define CONFIG_SYS_I2C_SPEED 100000 48 49 /* PMIC */ 50 #define CONFIG_POWER 51 #define CONFIG_POWER_I2C 52 #define CONFIG_POWER_PFUZE100 53 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 54 55 /* USB Configs */ 56 #ifdef CONFIG_CMD_USB 57 #define CONFIG_USB_EHCI 58 #define CONFIG_USB_EHCI_MX6 59 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 60 #define CONFIG_USB_HOST_ETHER 61 #define CONFIG_USB_ETHER_ASIX 62 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 63 #define CONFIG_MXC_USB_FLAGS 0 64 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ 65 #endif 66 67 #endif /* __MX6QSABRESD_CONFIG_H */ 68