xref: /rk3399_rockchip-uboot/include/configs/mx6sabresd.h (revision f8cb101e1e3f5ee2007b78b6b12e24120385aeac)
1c1747970SPierre Aubert /*
2c1747970SPierre Aubert  * Copyright (C) 2012 Freescale Semiconductor, Inc.
3c1747970SPierre Aubert  *
4c1747970SPierre Aubert  * Configuration settings for the Freescale i.MX6Q SabreSD board.
5c1747970SPierre Aubert  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7c1747970SPierre Aubert  */
8c1747970SPierre Aubert 
9c1747970SPierre Aubert #ifndef __MX6QSABRESD_CONFIG_H
10c1747970SPierre Aubert #define __MX6QSABRESD_CONFIG_H
11c1747970SPierre Aubert 
1258cc9787SPardeep Kumar Singla #include <asm/arch/imx-regs.h>
1358cc9787SPardeep Kumar Singla #include <asm/imx-common/gpio.h>
1458cc9787SPardeep Kumar Singla 
151558200aSJohn Tobias #ifdef CONFIG_SPL
161558200aSJohn Tobias #define CONFIG_SPL_LIBCOMMON_SUPPORT
171558200aSJohn Tobias #define CONFIG_SPL_MMC_SUPPORT
181558200aSJohn Tobias #include "imx6_spl.h"
191558200aSJohn Tobias #endif
201558200aSJohn Tobias 
21c1747970SPierre Aubert #define CONFIG_MACH_TYPE	3980
22c1747970SPierre Aubert #define CONFIG_MXC_UART_BASE	UART1_BASE
23c1747970SPierre Aubert #define CONFIG_CONSOLE_DEV		"ttymxc0"
24c1747970SPierre Aubert #define CONFIG_MMCROOT			"/dev/mmcblk1p2"
251d585241SFabio Estevam #if defined(CONFIG_MX6Q)
26c1747970SPierre Aubert #define CONFIG_DEFAULT_FDT_FILE	"imx6q-sabresd.dtb"
271d585241SFabio Estevam #elif defined(CONFIG_MX6DL)
281d585241SFabio Estevam #define CONFIG_DEFAULT_FDT_FILE	"imx6dl-sabresd.dtb"
291d585241SFabio Estevam #endif
30c1747970SPierre Aubert #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
31c1747970SPierre Aubert 
3203ce3302SOtavio Salvador #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
3303ce3302SOtavio Salvador 
34c1747970SPierre Aubert #include "mx6sabre_common.h"
35c1747970SPierre Aubert 
36c1747970SPierre Aubert #define CONFIG_SYS_FSL_USDHC_NUM	3
37c1747970SPierre Aubert #if defined(CONFIG_ENV_IS_IN_MMC)
38c1747970SPierre Aubert #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC3 */
39c1747970SPierre Aubert #endif
40c1747970SPierre Aubert 
41e919aa23SMarek Vasut #define CONFIG_CMD_PCI
42e919aa23SMarek Vasut #ifdef CONFIG_CMD_PCI
43e919aa23SMarek Vasut #define CONFIG_PCI
44e919aa23SMarek Vasut #define CONFIG_PCI_PNP
45e919aa23SMarek Vasut #define CONFIG_PCI_SCAN_SHOW
46e919aa23SMarek Vasut #define CONFIG_PCIE_IMX
47e919aa23SMarek Vasut #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
48e919aa23SMarek Vasut #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(3, 19)
49e919aa23SMarek Vasut #endif
50e919aa23SMarek Vasut 
5166ca09fcSFabio Estevam /* I2C Configs */
5266ca09fcSFabio Estevam #define CONFIG_CMD_I2C
5366ca09fcSFabio Estevam #define CONFIG_SYS_I2C
5466ca09fcSFabio Estevam #define CONFIG_SYS_I2C_MXC
55*f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
5666ca09fcSFabio Estevam #define CONFIG_SYS_I2C_SPEED		  100000
5766ca09fcSFabio Estevam 
5866ca09fcSFabio Estevam /* PMIC */
5966ca09fcSFabio Estevam #define CONFIG_POWER
6066ca09fcSFabio Estevam #define CONFIG_POWER_I2C
6166ca09fcSFabio Estevam #define CONFIG_POWER_PFUZE100
6266ca09fcSFabio Estevam #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
6366ca09fcSFabio Estevam 
645a3d63c5SPeng Fan /* USB Configs */
655a3d63c5SPeng Fan #define CONFIG_CMD_USB
665a3d63c5SPeng Fan #ifdef CONFIG_CMD_USB
675a3d63c5SPeng Fan #define CONFIG_USB_EHCI
685a3d63c5SPeng Fan #define CONFIG_USB_EHCI_MX6
695a3d63c5SPeng Fan #define CONFIG_USB_STORAGE
705a3d63c5SPeng Fan #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
715a3d63c5SPeng Fan #define CONFIG_USB_HOST_ETHER
725a3d63c5SPeng Fan #define CONFIG_USB_ETHER_ASIX
735a3d63c5SPeng Fan #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
745a3d63c5SPeng Fan #define CONFIG_MXC_USB_FLAGS		0
755a3d63c5SPeng Fan #define CONFIG_USB_MAX_CONTROLLER_COUNT	1 /* Enabled USB controller number */
765a3d63c5SPeng Fan #endif
775a3d63c5SPeng Fan 
78c1747970SPierre Aubert #endif                         /* __MX6QSABRESD_CONFIG_H */
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