1c1747970SPierre Aubert /* 2c1747970SPierre Aubert * Copyright (C) 2012 Freescale Semiconductor, Inc. 3c1747970SPierre Aubert * 4c1747970SPierre Aubert * Configuration settings for the Freescale i.MX6Q SabreSD board. 5c1747970SPierre Aubert * 61a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 7c1747970SPierre Aubert */ 8c1747970SPierre Aubert 9c1747970SPierre Aubert #ifndef __MX6QSABRESD_CONFIG_H 10c1747970SPierre Aubert #define __MX6QSABRESD_CONFIG_H 11c1747970SPierre Aubert 1258cc9787SPardeep Kumar Singla #include <asm/arch/imx-regs.h> 1358cc9787SPardeep Kumar Singla #include <asm/imx-common/gpio.h> 1458cc9787SPardeep Kumar Singla 15c1747970SPierre Aubert #define CONFIG_MACH_TYPE 3980 16c1747970SPierre Aubert #define CONFIG_MXC_UART_BASE UART1_BASE 17c1747970SPierre Aubert #define CONFIG_CONSOLE_DEV "ttymxc0" 18c1747970SPierre Aubert #define CONFIG_MMCROOT "/dev/mmcblk1p2" 191d585241SFabio Estevam #if defined(CONFIG_MX6Q) 20c1747970SPierre Aubert #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb" 211d585241SFabio Estevam #elif defined(CONFIG_MX6DL) 221d585241SFabio Estevam #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" 231d585241SFabio Estevam #endif 24c1747970SPierre Aubert #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 25c1747970SPierre Aubert 2603ce3302SOtavio Salvador #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 2703ce3302SOtavio Salvador 28c1747970SPierre Aubert #include "mx6sabre_common.h" 29c1747970SPierre Aubert 30c1747970SPierre Aubert #define CONFIG_SYS_FSL_USDHC_NUM 3 31c1747970SPierre Aubert #if defined(CONFIG_ENV_IS_IN_MMC) 32c1747970SPierre Aubert #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ 33c1747970SPierre Aubert #endif 34c1747970SPierre Aubert 3558cc9787SPardeep Kumar Singla /* Framebuffer */ 3658cc9787SPardeep Kumar Singla #define CONFIG_VIDEO 3758cc9787SPardeep Kumar Singla #define CONFIG_VIDEO_IPUV3 3858cc9787SPardeep Kumar Singla #define CONFIG_CFB_CONSOLE 3958cc9787SPardeep Kumar Singla #define CONFIG_VGA_AS_SINGLE_DEVICE 4058cc9787SPardeep Kumar Singla #define CONFIG_SYS_CONSOLE_IS_IN_ENV 4158cc9787SPardeep Kumar Singla #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 4258cc9787SPardeep Kumar Singla #define CONFIG_VIDEO_BMP_RLE8 4358cc9787SPardeep Kumar Singla #define CONFIG_SPLASH_SCREEN 4458cc9787SPardeep Kumar Singla #define CONFIG_SPLASH_SCREEN_ALIGN 4558cc9787SPardeep Kumar Singla #define CONFIG_BMP_16BPP 4658cc9787SPardeep Kumar Singla #define CONFIG_VIDEO_LOGO 4758cc9787SPardeep Kumar Singla #define CONFIG_VIDEO_BMP_LOGO 4858cc9787SPardeep Kumar Singla #define CONFIG_IPUV3_CLK 260000000 4958cc9787SPardeep Kumar Singla #define CONFIG_IMX_HDMI 50053b795eSEric Benard #define CONFIG_IMX_VIDEO_SKIP 5158cc9787SPardeep Kumar Singla 52e919aa23SMarek Vasut #define CONFIG_CMD_PCI 53e919aa23SMarek Vasut #ifdef CONFIG_CMD_PCI 54e919aa23SMarek Vasut #define CONFIG_PCI 55e919aa23SMarek Vasut #define CONFIG_PCI_PNP 56e919aa23SMarek Vasut #define CONFIG_PCI_SCAN_SHOW 57e919aa23SMarek Vasut #define CONFIG_PCIE_IMX 58e919aa23SMarek Vasut #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 59e919aa23SMarek Vasut #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) 60e919aa23SMarek Vasut #endif 61e919aa23SMarek Vasut 62*66ca09fcSFabio Estevam /* I2C Configs */ 63*66ca09fcSFabio Estevam #define CONFIG_CMD_I2C 64*66ca09fcSFabio Estevam #define CONFIG_SYS_I2C 65*66ca09fcSFabio Estevam #define CONFIG_SYS_I2C_MXC 66*66ca09fcSFabio Estevam #define CONFIG_SYS_I2C_SPEED 100000 67*66ca09fcSFabio Estevam 68*66ca09fcSFabio Estevam /* PMIC */ 69*66ca09fcSFabio Estevam #define CONFIG_POWER 70*66ca09fcSFabio Estevam #define CONFIG_POWER_I2C 71*66ca09fcSFabio Estevam #define CONFIG_POWER_PFUZE100 72*66ca09fcSFabio Estevam #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 73*66ca09fcSFabio Estevam 74c1747970SPierre Aubert #endif /* __MX6QSABRESD_CONFIG_H */ 75