1c1747970SPierre Aubert /* 2c1747970SPierre Aubert * Copyright (C) 2012 Freescale Semiconductor, Inc. 3c1747970SPierre Aubert * 4c1747970SPierre Aubert * Configuration settings for the Freescale i.MX6Q SabreSD board. 5c1747970SPierre Aubert * 61a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 7c1747970SPierre Aubert */ 8c1747970SPierre Aubert 9c1747970SPierre Aubert #ifndef __MX6QSABRESD_CONFIG_H 10c1747970SPierre Aubert #define __MX6QSABRESD_CONFIG_H 11c1747970SPierre Aubert 121558200aSJohn Tobias #ifdef CONFIG_SPL 131558200aSJohn Tobias #define CONFIG_SPL_LIBCOMMON_SUPPORT 141558200aSJohn Tobias #define CONFIG_SPL_MMC_SUPPORT 151558200aSJohn Tobias #include "imx6_spl.h" 161558200aSJohn Tobias #endif 171558200aSJohn Tobias 18c1747970SPierre Aubert #define CONFIG_MACH_TYPE 3980 19c1747970SPierre Aubert #define CONFIG_MXC_UART_BASE UART1_BASE 20c1747970SPierre Aubert #define CONFIG_CONSOLE_DEV "ttymxc0" 21c1747970SPierre Aubert #define CONFIG_MMCROOT "/dev/mmcblk1p2" 22c1747970SPierre Aubert #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 23c1747970SPierre Aubert 2403ce3302SOtavio Salvador #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 2503ce3302SOtavio Salvador 26c1747970SPierre Aubert #include "mx6sabre_common.h" 27c1747970SPierre Aubert 28c1747970SPierre Aubert #define CONFIG_SYS_FSL_USDHC_NUM 3 29c1747970SPierre Aubert #if defined(CONFIG_ENV_IS_IN_MMC) 30c1747970SPierre Aubert #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ 31c1747970SPierre Aubert #endif 32c1747970SPierre Aubert 33e919aa23SMarek Vasut #define CONFIG_CMD_PCI 34e919aa23SMarek Vasut #ifdef CONFIG_CMD_PCI 35e919aa23SMarek Vasut #define CONFIG_PCI 36e919aa23SMarek Vasut #define CONFIG_PCI_PNP 37e919aa23SMarek Vasut #define CONFIG_PCI_SCAN_SHOW 38e919aa23SMarek Vasut #define CONFIG_PCIE_IMX 39e919aa23SMarek Vasut #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 40e919aa23SMarek Vasut #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) 41e919aa23SMarek Vasut #endif 42e919aa23SMarek Vasut 4366ca09fcSFabio Estevam /* I2C Configs */ 4466ca09fcSFabio Estevam #define CONFIG_CMD_I2C 4566ca09fcSFabio Estevam #define CONFIG_SYS_I2C 4666ca09fcSFabio Estevam #define CONFIG_SYS_I2C_MXC 47*03544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 48*03544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 49f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 5066ca09fcSFabio Estevam #define CONFIG_SYS_I2C_SPEED 100000 5166ca09fcSFabio Estevam 5266ca09fcSFabio Estevam /* PMIC */ 5366ca09fcSFabio Estevam #define CONFIG_POWER 5466ca09fcSFabio Estevam #define CONFIG_POWER_I2C 5566ca09fcSFabio Estevam #define CONFIG_POWER_PFUZE100 5666ca09fcSFabio Estevam #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 5766ca09fcSFabio Estevam 585a3d63c5SPeng Fan /* USB Configs */ 595a3d63c5SPeng Fan #define CONFIG_CMD_USB 605a3d63c5SPeng Fan #ifdef CONFIG_CMD_USB 615a3d63c5SPeng Fan #define CONFIG_USB_EHCI 625a3d63c5SPeng Fan #define CONFIG_USB_EHCI_MX6 635a3d63c5SPeng Fan #define CONFIG_USB_STORAGE 645a3d63c5SPeng Fan #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 655a3d63c5SPeng Fan #define CONFIG_USB_HOST_ETHER 665a3d63c5SPeng Fan #define CONFIG_USB_ETHER_ASIX 675a3d63c5SPeng Fan #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 685a3d63c5SPeng Fan #define CONFIG_MXC_USB_FLAGS 0 695a3d63c5SPeng Fan #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ 705a3d63c5SPeng Fan #endif 715a3d63c5SPeng Fan 72c1747970SPierre Aubert #endif /* __MX6QSABRESD_CONFIG_H */ 73