1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53SMD Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #define CONFIG_MX53 13 14 #define CONFIG_DISPLAY_CPUINFO 15 #define CONFIG_DISPLAY_BOARDINFO 16 17 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD 18 19 #include <asm/arch/imx-regs.h> 20 21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 #define CONFIG_REVISION_TAG 25 26 #define CONFIG_SYS_FSL_CLK 27 28 /* Size of malloc() pool */ 29 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 30 31 #define CONFIG_BOARD_EARLY_INIT_F 32 #define CONFIG_MXC_GPIO 33 34 #define CONFIG_MXC_UART 35 #define CONFIG_MXC_UART_BASE UART1_BASE 36 37 /* I2C Configs */ 38 #define CONFIG_SYS_I2C 39 #define CONFIG_SYS_I2C_MXC 40 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 41 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 42 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 43 44 /* MMC Configs */ 45 #define CONFIG_FSL_ESDHC 46 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 47 #define CONFIG_SYS_FSL_ESDHC_NUM 1 48 49 #define CONFIG_MMC 50 #define CONFIG_CMD_MMC 51 #define CONFIG_GENERIC_MMC 52 #define CONFIG_CMD_FAT 53 #define CONFIG_DOS_PARTITION 54 55 /* Eth Configs */ 56 #define CONFIG_HAS_ETH1 57 #define CONFIG_MII 58 59 #define CONFIG_FEC_MXC 60 #define IMX_FEC_BASE FEC_BASE_ADDR 61 #define CONFIG_FEC_MXC_PHYADDR 0x1F 62 63 #define CONFIG_CMD_MII 64 65 /* allow to overwrite serial and ethaddr */ 66 #define CONFIG_ENV_OVERWRITE 67 #define CONFIG_CONS_INDEX 1 68 #define CONFIG_BAUDRATE 115200 69 70 /* Command definition */ 71 #define CONFIG_BOOTDELAY 3 72 73 #define CONFIG_ETHPRIME "FEC0" 74 75 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 76 #define CONFIG_SYS_TEXT_BASE 0x77800000 77 78 #define CONFIG_EXTRA_ENV_SETTINGS \ 79 "script=boot.scr\0" \ 80 "uimage=uImage\0" \ 81 "mmcdev=0\0" \ 82 "mmcpart=2\0" \ 83 "mmcroot=/dev/mmcblk0p3 rw\0" \ 84 "mmcrootfstype=ext3 rootwait\0" \ 85 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 86 "root=${mmcroot} " \ 87 "rootfstype=${mmcrootfstype}\0" \ 88 "loadbootscript=" \ 89 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 90 "bootscript=echo Running bootscript from mmc ...; " \ 91 "source\0" \ 92 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 93 "mmcboot=echo Booting from mmc ...; " \ 94 "run mmcargs; " \ 95 "bootm\0" \ 96 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 97 "root=/dev/nfs " \ 98 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 99 "netboot=echo Booting from net ...; " \ 100 "run netargs; " \ 101 "dhcp ${uimage}; bootm\0" \ 102 103 #define CONFIG_BOOTCOMMAND \ 104 "mmc dev ${mmcdev}; if mmc rescan; then " \ 105 "if run loadbootscript; then " \ 106 "run bootscript; " \ 107 "else " \ 108 "if run loaduimage; then " \ 109 "run mmcboot; " \ 110 "else run netboot; " \ 111 "fi; " \ 112 "fi; " \ 113 "else run netboot; fi" 114 #define CONFIG_ARP_TIMEOUT 200UL 115 116 /* Miscellaneous configurable options */ 117 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 118 #define CONFIG_AUTO_COMPLETE 119 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 120 121 /* Print Buffer Size */ 122 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 123 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 124 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 125 126 #define CONFIG_SYS_MEMTEST_START 0x70000000 127 #define CONFIG_SYS_MEMTEST_END 0x70010000 128 129 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 130 131 #define CONFIG_CMDLINE_EDITING 132 133 /* Physical Memory Map */ 134 #define CONFIG_NR_DRAM_BANKS 2 135 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 136 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 137 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 138 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 139 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 140 141 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 142 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 143 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 144 145 #define CONFIG_SYS_INIT_SP_OFFSET \ 146 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 147 #define CONFIG_SYS_INIT_SP_ADDR \ 148 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 149 150 /* FLASH and environment organization */ 151 #define CONFIG_SYS_NO_FLASH 152 153 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 154 #define CONFIG_ENV_SIZE (8 * 1024) 155 #define CONFIG_ENV_IS_IN_MMC 156 #define CONFIG_SYS_MMC_ENV_DEV 0 157 158 #endif /* __CONFIG_H */ 159