1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * Jason Liu <r64343@freescale.com> 4 * 5 * Configuration settings for Freescale MX53 low cost board. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #ifndef __CONFIG_H 24 #define __CONFIG_H 25 26 #define CONFIG_MX53 27 28 #define CONFIG_SYS_MX5_HCLK 24000000 29 #define CONFIG_SYS_MX5_CLK32 32768 30 #define CONFIG_DISPLAY_CPUINFO 31 #define CONFIG_DISPLAY_BOARDINFO 32 33 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO 34 35 #include <asm/arch/imx-regs.h> 36 37 #define CONFIG_CMDLINE_TAG 38 #define CONFIG_SETUP_MEMORY_TAGS 39 #define CONFIG_INITRD_TAG 40 41 /* Size of malloc() pool */ 42 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 43 44 #define CONFIG_BOARD_EARLY_INIT_F 45 #define CONFIG_MXC_GPIO 46 47 #define CONFIG_MXC_UART 48 #define CONFIG_MXC_UART_BASE UART1_BASE 49 50 /* MMC Configs */ 51 #define CONFIG_FSL_ESDHC 52 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 53 #define CONFIG_SYS_FSL_ESDHC_NUM 2 54 55 #define CONFIG_MMC 56 #define CONFIG_CMD_MMC 57 #define CONFIG_GENERIC_MMC 58 #define CONFIG_CMD_FAT 59 #define CONFIG_CMD_EXT2 60 #define CONFIG_DOS_PARTITION 61 62 /* Eth Configs */ 63 #define CONFIG_HAS_ETH1 64 #define CONFIG_MII 65 #define CONFIG_DISCOVER_PHY 66 67 #define CONFIG_FEC_MXC 68 #define IMX_FEC_BASE FEC_BASE_ADDR 69 #define CONFIG_FEC_MXC_PHYADDR 0x1F 70 71 #define CONFIG_CMD_PING 72 #define CONFIG_CMD_DHCP 73 #define CONFIG_CMD_MII 74 #define CONFIG_CMD_NET 75 76 /* USB Configs */ 77 #define CONFIG_CMD_USB 78 #define CONFIG_CMD_FAT 79 #define CONFIG_USB_EHCI 80 #define CONFIG_USB_EHCI_MX5 81 #define CONFIG_USB_STORAGE 82 #define CONFIG_USB_HOST_ETHER 83 #define CONFIG_USB_ETHER_ASIX 84 #define CONFIG_USB_ETHER_SMSC95XX 85 #define CONFIG_MXC_USB_PORT 1 86 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 87 #define CONFIG_MXC_USB_FLAGS 0 88 89 /* allow to overwrite serial and ethaddr */ 90 #define CONFIG_ENV_OVERWRITE 91 #define CONFIG_CONS_INDEX 1 92 #define CONFIG_BAUDRATE 115200 93 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 94 95 /* Command definition */ 96 #include <config_cmd_default.h> 97 98 #undef CONFIG_CMD_IMLS 99 100 #define CONFIG_BOOTDELAY 3 101 102 #define CONFIG_ETHPRIME "FEC0" 103 104 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 105 #define CONFIG_SYS_TEXT_BASE 0x77800000 106 107 #define CONFIG_EXTRA_ENV_SETTINGS \ 108 "script=boot.scr\0" \ 109 "uimage=uImage\0" \ 110 "mmcdev=0\0" \ 111 "mmcpart=2\0" \ 112 "mmcroot=/dev/mmcblk0p3 rw\0" \ 113 "mmcrootfstype=ext3 rootwait\0" \ 114 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 115 "root=${mmcroot} " \ 116 "rootfstype=${mmcrootfstype}\0" \ 117 "loadbootscript=" \ 118 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 119 "bootscript=echo Running bootscript from mmc ...; " \ 120 "source\0" \ 121 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 122 "mmcboot=echo Booting from mmc ...; " \ 123 "run mmcargs; " \ 124 "bootm\0" \ 125 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 126 "root=/dev/nfs " \ 127 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 128 "netboot=echo Booting from net ...; " \ 129 "run netargs; " \ 130 "dhcp ${uimage}; bootm\0" \ 131 132 #define CONFIG_BOOTCOMMAND \ 133 "if mmc rescan ${mmcdev}; then " \ 134 "if run loadbootscript; then " \ 135 "run bootscript; " \ 136 "else " \ 137 "if run loaduimage; then " \ 138 "run mmcboot; " \ 139 "else run netboot; " \ 140 "fi; " \ 141 "fi; " \ 142 "else run netboot; fi" 143 144 #define CONFIG_ARP_TIMEOUT 200UL 145 146 /* Miscellaneous configurable options */ 147 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 148 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 149 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 150 #define CONFIG_SYS_PROMPT "MX53LOCO U-Boot > " 151 #define CONFIG_AUTO_COMPLETE 152 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 153 154 /* Print Buffer Size */ 155 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 156 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 157 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 158 159 #define CONFIG_SYS_MEMTEST_START 0x70000000 160 #define CONFIG_SYS_MEMTEST_END 0x70010000 161 162 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 163 164 #define CONFIG_SYS_HZ 1000 165 #define CONFIG_CMDLINE_EDITING 166 167 /* Stack sizes */ 168 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 169 170 /* Physical Memory Map */ 171 #define CONFIG_NR_DRAM_BANKS 2 172 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 173 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 174 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 175 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 176 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 177 178 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 179 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 180 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 181 182 #define CONFIG_SYS_INIT_SP_OFFSET \ 183 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 184 #define CONFIG_SYS_INIT_SP_ADDR \ 185 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 186 187 /* FLASH and environment organization */ 188 #define CONFIG_SYS_NO_FLASH 189 190 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 191 #define CONFIG_ENV_SIZE (8 * 1024) 192 #define CONFIG_ENV_IS_IN_MMC 193 #define CONFIG_SYS_MMC_ENV_DEV 0 194 195 #define CONFIG_OF_LIBFDT 196 197 #define CONFIG_CMD_SATA 198 #ifdef CONFIG_CMD_SATA 199 #define CONFIG_DWC_AHSATA 200 #define CONFIG_SYS_SATA_MAX_DEVICE 1 201 #define CONFIG_DWC_AHSATA_PORT_ID 0 202 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 203 #define CONFIG_LBA48 204 #define CONFIG_LIBATA 205 #endif 206 207 #endif /* __CONFIG_H */ 208