xref: /rk3399_rockchip-uboot/include/configs/mx53evk.h (revision d66a10fc00407fda3c5091ca38c090dc055f7953)
1 /*
2  * Copyright (C) 2010 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the MX53-EVK Freescale board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_EVK
13 
14 #include <asm/arch/imx-regs.h>
15 
16 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19 #define CONFIG_REVISION_TAG
20 
21 #define CONFIG_SYS_FSL_CLK
22 
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25 
26 #define CONFIG_MXC_GPIO
27 
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE	UART1_BASE
30 
31 /* I2C Configs */
32 #define CONFIG_SYS_I2C
33 #define CONFIG_SYS_I2C_MXC
34 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
35 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
36 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
37 
38 /* PMIC Configs */
39 #define CONFIG_POWER
40 #define CONFIG_POWER_I2C
41 #define CONFIG_POWER_FSL
42 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    8
43 #define CONFIG_POWER_FSL_MC13892
44 #define CONFIG_RTC_MC13XXX
45 
46 /* MMC Configs */
47 #define CONFIG_FSL_ESDHC
48 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
49 #define CONFIG_SYS_FSL_ESDHC_NUM	2
50 
51 /* Eth Configs */
52 #define CONFIG_MII
53 
54 #define CONFIG_FEC_MXC
55 #define IMX_FEC_BASE	FEC_BASE_ADDR
56 #define CONFIG_FEC_MXC_PHYADDR	0x1F
57 
58 #define CONFIG_CMD_DATE
59 
60 /* allow to overwrite serial and ethaddr */
61 #define CONFIG_ENV_OVERWRITE
62 #define CONFIG_CONS_INDEX		1
63 
64 /* Command definition */
65 
66 #define CONFIG_ETHPRIME		"FEC0"
67 
68 #define CONFIG_LOADADDR		0x70800000	/* loadaddr env var */
69 #define CONFIG_SYS_TEXT_BASE    0x77800000
70 
71 #define CONFIG_EXTRA_ENV_SETTINGS \
72 	"script=boot.scr\0" \
73 	"uimage=uImage\0" \
74 	"mmcdev=0\0" \
75 	"mmcpart=2\0" \
76 	"mmcroot=/dev/mmcblk0p3 rw\0" \
77 	"mmcrootfstype=ext3 rootwait\0" \
78 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
79 		"root=${mmcroot} " \
80 		"rootfstype=${mmcrootfstype}\0" \
81 	"loadbootscript=" \
82 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
83 	"bootscript=echo Running bootscript from mmc ...; " \
84 		"source\0" \
85 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
86 	"mmcboot=echo Booting from mmc ...; " \
87 		"run mmcargs; " \
88 		"bootm\0" \
89 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
90 		"root=/dev/nfs " \
91 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
92 	"netboot=echo Booting from net ...; " \
93 		"run netargs; " \
94 		"dhcp ${uimage}; bootm\0" \
95 
96 #define CONFIG_BOOTCOMMAND \
97 	"mmc dev ${mmcdev}; if mmc rescan; then " \
98 		"if run loadbootscript; then " \
99 			"run bootscript; " \
100 		"else " \
101 			"if run loaduimage; then " \
102 				"run mmcboot; " \
103 			"else run netboot; " \
104 			"fi; " \
105 		"fi; " \
106 	"else run netboot; fi"
107 
108 #define CONFIG_ARP_TIMEOUT	200UL
109 
110 /* Miscellaneous configurable options */
111 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
112 #define CONFIG_AUTO_COMPLETE
113 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
114 
115 /* Print Buffer Size */
116 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
117 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
118 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
119 
120 #define CONFIG_SYS_MEMTEST_START       0x70000000
121 #define CONFIG_SYS_MEMTEST_END         0x70010000
122 
123 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
124 
125 #define CONFIG_CMDLINE_EDITING
126 
127 /* Physical Memory Map */
128 #define CONFIG_NR_DRAM_BANKS	1
129 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
130 #define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
131 
132 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
133 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
134 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
135 
136 #define CONFIG_SYS_INIT_SP_OFFSET \
137 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
138 #define CONFIG_SYS_INIT_SP_ADDR \
139 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
140 
141 /* environment organization */
142 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
143 #define CONFIG_ENV_SIZE        (8 * 1024)
144 #define CONFIG_ENV_IS_IN_MMC
145 #define CONFIG_SYS_MMC_ENV_DEV 0
146 
147 #endif				/* __CONFIG_H */
148