xref: /rk3399_rockchip-uboot/include/configs/mx53evk.h (revision 5707dfb02e0886ab69d51bfc161cd80b3e33a864)
1 /*
2  * Copyright (C) 2010 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the MX53-EVK Freescale board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #define CONFIG_MX53
13 
14 #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_EVK
15 
16 #include <asm/arch/imx-regs.h>
17 
18 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
22 
23 #define CONFIG_SYS_FSL_CLK
24 
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
27 
28 #define CONFIG_MXC_GPIO
29 
30 #define CONFIG_MXC_UART
31 #define CONFIG_MXC_UART_BASE	UART1_BASE
32 
33 /* I2C Configs */
34 #define CONFIG_SYS_I2C
35 #define CONFIG_SYS_I2C_MXC
36 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
37 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
38 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
39 
40 /* PMIC Configs */
41 #define CONFIG_POWER
42 #define CONFIG_POWER_I2C
43 #define CONFIG_POWER_FSL
44 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    8
45 #define CONFIG_POWER_FSL_MC13892
46 #define CONFIG_RTC_MC13XXX
47 
48 /* MMC Configs */
49 #define CONFIG_FSL_ESDHC
50 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
51 #define CONFIG_SYS_FSL_ESDHC_NUM	2
52 
53 #define CONFIG_GENERIC_MMC
54 #define CONFIG_DOS_PARTITION
55 
56 /* Eth Configs */
57 #define CONFIG_MII
58 
59 #define CONFIG_FEC_MXC
60 #define IMX_FEC_BASE	FEC_BASE_ADDR
61 #define CONFIG_FEC_MXC_PHYADDR	0x1F
62 
63 #define CONFIG_CMD_DATE
64 
65 /* Miscellaneous commands */
66 #define CONFIG_CMD_BMODE
67 
68 /* allow to overwrite serial and ethaddr */
69 #define CONFIG_ENV_OVERWRITE
70 #define CONFIG_CONS_INDEX		1
71 #define CONFIG_BAUDRATE			115200
72 
73 /* Command definition */
74 
75 #define CONFIG_ETHPRIME		"FEC0"
76 
77 #define CONFIG_LOADADDR		0x70800000	/* loadaddr env var */
78 #define CONFIG_SYS_TEXT_BASE    0x77800000
79 
80 #define CONFIG_EXTRA_ENV_SETTINGS \
81 	"script=boot.scr\0" \
82 	"uimage=uImage\0" \
83 	"mmcdev=0\0" \
84 	"mmcpart=2\0" \
85 	"mmcroot=/dev/mmcblk0p3 rw\0" \
86 	"mmcrootfstype=ext3 rootwait\0" \
87 	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
88 		"root=${mmcroot} " \
89 		"rootfstype=${mmcrootfstype}\0" \
90 	"loadbootscript=" \
91 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
92 	"bootscript=echo Running bootscript from mmc ...; " \
93 		"source\0" \
94 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
95 	"mmcboot=echo Booting from mmc ...; " \
96 		"run mmcargs; " \
97 		"bootm\0" \
98 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
99 		"root=/dev/nfs " \
100 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
101 	"netboot=echo Booting from net ...; " \
102 		"run netargs; " \
103 		"dhcp ${uimage}; bootm\0" \
104 
105 #define CONFIG_BOOTCOMMAND \
106 	"mmc dev ${mmcdev}; if mmc rescan; then " \
107 		"if run loadbootscript; then " \
108 			"run bootscript; " \
109 		"else " \
110 			"if run loaduimage; then " \
111 				"run mmcboot; " \
112 			"else run netboot; " \
113 			"fi; " \
114 		"fi; " \
115 	"else run netboot; fi"
116 
117 #define CONFIG_ARP_TIMEOUT	200UL
118 
119 /* Miscellaneous configurable options */
120 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
121 #define CONFIG_AUTO_COMPLETE
122 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
123 
124 /* Print Buffer Size */
125 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
126 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
127 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
128 
129 #define CONFIG_SYS_MEMTEST_START       0x70000000
130 #define CONFIG_SYS_MEMTEST_END         0x70010000
131 
132 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
133 
134 #define CONFIG_CMDLINE_EDITING
135 
136 /* Physical Memory Map */
137 #define CONFIG_NR_DRAM_BANKS	1
138 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
139 #define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
140 
141 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
142 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
143 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
144 
145 #define CONFIG_SYS_INIT_SP_OFFSET \
146 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
147 #define CONFIG_SYS_INIT_SP_ADDR \
148 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
149 
150 /* FLASH and environment organization */
151 #define CONFIG_SYS_NO_FLASH
152 
153 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
154 #define CONFIG_ENV_SIZE        (8 * 1024)
155 #define CONFIG_ENV_IS_IN_MMC
156 #define CONFIG_SYS_MMC_ENV_DEV 0
157 
158 #endif				/* __CONFIG_H */
159