1 /* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* High Level Configuration Options */ 15 16 #define CONFIG_MX51 /* in a mx51 */ 17 18 #define CONFIG_SYS_FSL_CLK 19 #define CONFIG_SYS_TEXT_BASE 0x97800000 20 21 #include <asm/arch/imx-regs.h> 22 23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 24 #define CONFIG_SETUP_MEMORY_TAGS 25 #define CONFIG_INITRD_TAG 26 #define CONFIG_REVISION_TAG 27 28 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 29 /* 30 * Size of malloc() pool 31 */ 32 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 33 34 #define CONFIG_BOARD_LATE_INIT 35 36 /* 37 * Hardware drivers 38 */ 39 #define CONFIG_FSL_IIM 40 #define CONFIG_CMD_FUSE 41 42 #define CONFIG_MXC_UART 43 #define CONFIG_MXC_UART_BASE UART1_BASE 44 #define CONFIG_MXC_GPIO 45 46 /* 47 * SPI Configs 48 * */ 49 50 #define CONFIG_MXC_SPI 51 52 /* PMIC Controller */ 53 #define CONFIG_POWER 54 #define CONFIG_POWER_SPI 55 #define CONFIG_POWER_FSL 56 #define CONFIG_FSL_PMIC_BUS 0 57 #define CONFIG_FSL_PMIC_CS 0 58 #define CONFIG_FSL_PMIC_CLK 2500000 59 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 60 #define CONFIG_FSL_PMIC_BITLEN 32 61 #define CONFIG_RTC_MC13XXX 62 63 /* 64 * MMC Configs 65 * */ 66 #define CONFIG_FSL_ESDHC 67 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 68 #define CONFIG_SYS_FSL_ESDHC_NUM 2 69 70 #define CONFIG_MMC 71 72 #define CONFIG_GENERIC_MMC 73 #define CONFIG_DOS_PARTITION 74 75 /* 76 * Eth Configs 77 */ 78 #define CONFIG_MII 79 80 #define CONFIG_FEC_MXC 81 #define IMX_FEC_BASE FEC_BASE_ADDR 82 #define CONFIG_FEC_MXC_PHYADDR 0x1F 83 84 /* USB Configs */ 85 #define CONFIG_USB_EHCI 86 #define CONFIG_USB_EHCI_MX5 87 #define CONFIG_USB_HOST_ETHER 88 #define CONFIG_USB_ETHER_ASIX 89 #define CONFIG_USB_ETHER_SMSC95XX 90 #define CONFIG_MXC_USB_PORT 1 91 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 92 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 93 94 /* Framebuffer and LCD */ 95 #define CONFIG_PREBOOT 96 #define CONFIG_VIDEO_IPUV3 97 #define CONFIG_CFB_CONSOLE 98 #define CONFIG_VGA_AS_SINGLE_DEVICE 99 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 100 #define CONFIG_VIDEO_BMP_RLE8 101 #define CONFIG_SPLASH_SCREEN 102 #define CONFIG_BMP_16BPP 103 #define CONFIG_VIDEO_LOGO 104 #define CONFIG_IPUV3_CLK 133000000 105 106 /* allow to overwrite serial and ethaddr */ 107 #define CONFIG_ENV_OVERWRITE 108 #define CONFIG_CONS_INDEX 1 109 #define CONFIG_BAUDRATE 115200 110 111 /*********************************************************** 112 * Command definition 113 ***********************************************************/ 114 115 #define CONFIG_CMD_DATE 116 117 118 #define CONFIG_ETHPRIME "FEC0" 119 120 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */ 121 122 #define CONFIG_EXTRA_ENV_SETTINGS \ 123 "script=boot.scr\0" \ 124 "image=zImage\0" \ 125 "fdt_file=imx51-babbage.dtb\0" \ 126 "fdt_addr=0x91000000\0" \ 127 "boot_fdt=try\0" \ 128 "ip_dyn=yes\0" \ 129 "mmcdev=0\0" \ 130 "mmcpart=1\0" \ 131 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 132 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 133 "root=${mmcroot}\0" \ 134 "loadbootscript=" \ 135 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 136 "bootscript=echo Running bootscript from mmc ...; " \ 137 "source\0" \ 138 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 139 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 140 "mmcboot=echo Booting from mmc ...; " \ 141 "run mmcargs; " \ 142 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 143 "if run loadfdt; then " \ 144 "bootz ${loadaddr} - ${fdt_addr}; " \ 145 "else " \ 146 "if test ${boot_fdt} = try; then " \ 147 "bootz; " \ 148 "else " \ 149 "echo WARN: Cannot load the DT; " \ 150 "fi; " \ 151 "fi; " \ 152 "else " \ 153 "bootz; " \ 154 "fi;\0" \ 155 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 156 "root=/dev/nfs " \ 157 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 158 "netboot=echo Booting from net ...; " \ 159 "run netargs; " \ 160 "if test ${ip_dyn} = yes; then " \ 161 "setenv get_cmd dhcp; " \ 162 "else " \ 163 "setenv get_cmd tftp; " \ 164 "fi; " \ 165 "${get_cmd} ${image}; " \ 166 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 167 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 168 "bootz ${loadaddr} - ${fdt_addr}; " \ 169 "else " \ 170 "if test ${boot_fdt} = try; then " \ 171 "bootz; " \ 172 "else " \ 173 "echo ERROR: Cannot load the DT; " \ 174 "exit; " \ 175 "fi; " \ 176 "fi; " \ 177 "else " \ 178 "bootz; " \ 179 "fi;\0" 180 181 #define CONFIG_BOOTCOMMAND \ 182 "mmc dev ${mmcdev}; if mmc rescan; then " \ 183 "if run loadbootscript; then " \ 184 "run bootscript; " \ 185 "else " \ 186 "if run loadimage; then " \ 187 "run mmcboot; " \ 188 "else run netboot; " \ 189 "fi; " \ 190 "fi; " \ 191 "else run netboot; fi" 192 193 #define CONFIG_ARP_TIMEOUT 200UL 194 195 /* 196 * Miscellaneous configurable options 197 */ 198 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 199 #define CONFIG_AUTO_COMPLETE 200 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 201 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 202 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 203 204 #define CONFIG_SYS_MEMTEST_START 0x90000000 205 #define CONFIG_SYS_MEMTEST_END 0x90010000 206 207 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 208 209 #define CONFIG_CMDLINE_EDITING 210 211 /*----------------------------------------------------------------------- 212 * Physical Memory Map 213 */ 214 #define CONFIG_NR_DRAM_BANKS 1 215 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 216 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 217 218 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 219 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 220 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 221 222 #define CONFIG_BOARD_EARLY_INIT_F 223 224 #define CONFIG_SYS_INIT_SP_OFFSET \ 225 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 226 #define CONFIG_SYS_INIT_SP_ADDR \ 227 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 228 229 #define CONFIG_SYS_DDR_CLKSEL 0 230 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 231 #define CONFIG_SYS_MAIN_PWR_ON 232 233 /*----------------------------------------------------------------------- 234 * FLASH and environment organization 235 */ 236 #define CONFIG_SYS_NO_FLASH 237 238 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 239 #define CONFIG_ENV_SIZE (8 * 1024) 240 #define CONFIG_ENV_IS_IN_MMC 241 #define CONFIG_SYS_MMC_ENV_DEV 0 242 243 #endif 244