1 /* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* High Level Configuration Options */ 15 16 #define CONFIG_SYS_FSL_CLK 17 #define CONFIG_SYS_TEXT_BASE 0x97800000 18 19 #include <asm/arch/imx-regs.h> 20 21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 #define CONFIG_REVISION_TAG 25 26 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 27 /* 28 * Size of malloc() pool 29 */ 30 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 31 32 /* 33 * Hardware drivers 34 */ 35 #define CONFIG_FSL_IIM 36 37 #define CONFIG_MXC_UART 38 #define CONFIG_MXC_UART_BASE UART1_BASE 39 #define CONFIG_MXC_GPIO 40 41 /* 42 * SPI Configs 43 * */ 44 45 #define CONFIG_MXC_SPI 46 47 /* PMIC Controller */ 48 #define CONFIG_POWER 49 #define CONFIG_POWER_SPI 50 #define CONFIG_POWER_FSL 51 #define CONFIG_FSL_PMIC_BUS 0 52 #define CONFIG_FSL_PMIC_CS 0 53 #define CONFIG_FSL_PMIC_CLK 2500000 54 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 55 #define CONFIG_FSL_PMIC_BITLEN 32 56 #define CONFIG_RTC_MC13XXX 57 58 /* 59 * MMC Configs 60 * */ 61 #define CONFIG_FSL_ESDHC 62 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 63 #define CONFIG_SYS_FSL_ESDHC_NUM 2 64 65 /* 66 * Eth Configs 67 */ 68 #define CONFIG_MII 69 70 #define CONFIG_FEC_MXC 71 #define IMX_FEC_BASE FEC_BASE_ADDR 72 #define CONFIG_FEC_MXC_PHYADDR 0x1F 73 74 /* USB Configs */ 75 #define CONFIG_USB_EHCI_MX5 76 #define CONFIG_USB_ETHER_ASIX 77 #define CONFIG_USB_ETHER_SMSC95XX 78 #define CONFIG_MXC_USB_PORT 1 79 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 80 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 81 82 /* Framebuffer and LCD */ 83 #define CONFIG_PREBOOT 84 #define CONFIG_VIDEO_IPUV3 85 #define CONFIG_VIDEO_BMP_RLE8 86 #define CONFIG_SPLASH_SCREEN 87 #define CONFIG_BMP_16BPP 88 #define CONFIG_VIDEO_LOGO 89 #define CONFIG_IPUV3_CLK 133000000 90 91 /* allow to overwrite serial and ethaddr */ 92 #define CONFIG_ENV_OVERWRITE 93 #define CONFIG_CONS_INDEX 1 94 95 #define CONFIG_ETHPRIME "FEC0" 96 97 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */ 98 99 #define CONFIG_EXTRA_ENV_SETTINGS \ 100 "script=boot.scr\0" \ 101 "image=zImage\0" \ 102 "fdt_file=imx51-babbage.dtb\0" \ 103 "fdt_addr=0x91000000\0" \ 104 "boot_fdt=try\0" \ 105 "ip_dyn=yes\0" \ 106 "mmcdev=0\0" \ 107 "mmcpart=1\0" \ 108 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 109 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 110 "root=${mmcroot}\0" \ 111 "loadbootscript=" \ 112 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 113 "bootscript=echo Running bootscript from mmc ...; " \ 114 "source\0" \ 115 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 116 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 117 "mmcboot=echo Booting from mmc ...; " \ 118 "run mmcargs; " \ 119 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 120 "if run loadfdt; then " \ 121 "bootz ${loadaddr} - ${fdt_addr}; " \ 122 "else " \ 123 "if test ${boot_fdt} = try; then " \ 124 "bootz; " \ 125 "else " \ 126 "echo WARN: Cannot load the DT; " \ 127 "fi; " \ 128 "fi; " \ 129 "else " \ 130 "bootz; " \ 131 "fi;\0" \ 132 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 133 "root=/dev/nfs " \ 134 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 135 "netboot=echo Booting from net ...; " \ 136 "run netargs; " \ 137 "if test ${ip_dyn} = yes; then " \ 138 "setenv get_cmd dhcp; " \ 139 "else " \ 140 "setenv get_cmd tftp; " \ 141 "fi; " \ 142 "${get_cmd} ${image}; " \ 143 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 144 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 145 "bootz ${loadaddr} - ${fdt_addr}; " \ 146 "else " \ 147 "if test ${boot_fdt} = try; then " \ 148 "bootz; " \ 149 "else " \ 150 "echo ERROR: Cannot load the DT; " \ 151 "exit; " \ 152 "fi; " \ 153 "fi; " \ 154 "else " \ 155 "bootz; " \ 156 "fi;\0" 157 158 #define CONFIG_BOOTCOMMAND \ 159 "mmc dev ${mmcdev}; if mmc rescan; then " \ 160 "if run loadbootscript; then " \ 161 "run bootscript; " \ 162 "else " \ 163 "if run loadimage; then " \ 164 "run mmcboot; " \ 165 "else run netboot; " \ 166 "fi; " \ 167 "fi; " \ 168 "else run netboot; fi" 169 170 #define CONFIG_ARP_TIMEOUT 200UL 171 172 /* 173 * Miscellaneous configurable options 174 */ 175 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 176 #define CONFIG_AUTO_COMPLETE 177 178 #define CONFIG_SYS_MEMTEST_START 0x90000000 179 #define CONFIG_SYS_MEMTEST_END 0x90010000 180 181 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 182 183 #define CONFIG_CMDLINE_EDITING 184 185 /*----------------------------------------------------------------------- 186 * Physical Memory Map 187 */ 188 #define CONFIG_NR_DRAM_BANKS 1 189 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 190 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 191 192 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 193 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 194 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 195 196 #define CONFIG_SYS_INIT_SP_OFFSET \ 197 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 198 #define CONFIG_SYS_INIT_SP_ADDR \ 199 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 200 201 #define CONFIG_SYS_DDR_CLKSEL 0 202 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 203 #define CONFIG_SYS_MAIN_PWR_ON 204 205 /*----------------------------------------------------------------------- 206 * environment organization 207 */ 208 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 209 #define CONFIG_ENV_SIZE (8 * 1024) 210 #define CONFIG_SYS_MMC_ENV_DEV 0 211 212 #endif 213