xref: /rk3399_rockchip-uboot/include/configs/mx35pdk.h (revision d0f5600f544eff898bd6fa8461d363c599aa86d4)
1 /*
2  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7  *
8  * Configuration for the MX35pdk Freescale board.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #ifndef __CONFIG_H
27 #define __CONFIG_H
28 
29 #include <asm/arch/imx-regs.h>
30 
31  /* High Level Configuration Options */
32 #define CONFIG_ARM1136	/* This is an arm1136 CPU core */
33 #define CONFIG_MX35
34 #define CONFIG_MX35_HCLK_FREQ	24000000
35 
36 #define CONFIG_DISPLAY_CPUINFO
37 #define CONFIG_DISPLAY_BOARDINFO
38 
39 /* Set TEXT at the beginning of the NOR flash */
40 #define CONFIG_SYS_TEXT_BASE	0xA0000000
41 #define CONFIG_SYS_CACHELINE_SIZE	32
42 
43 #define CONFIG_SYS_64BIT_VSPRINTF
44 
45 #define CONFIG_BOARD_EARLY_INIT_F
46 #define CONFIG_BOARD_LATE_INIT
47 
48 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
49 #define CONFIG_REVISION_TAG
50 #define CONFIG_SETUP_MEMORY_TAGS
51 #define CONFIG_INITRD_TAG
52 
53 /*
54  * Size of malloc() pool
55  */
56 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
57 
58 /*
59  * Hardware drivers
60  */
61 #define CONFIG_HARD_I2C
62 #define CONFIG_I2C_MXC
63 #define CONFIG_SYS_I2C_MX35_PORT1
64 #define CONFIG_SYS_I2C_SPEED		100000
65 #define CONFIG_SYS_I2C_SLAVE		0xfe
66 #define CONFIG_MXC_SPI
67 #define CONFIG_MXC_GPIO
68 
69 
70 /*
71  * PMIC Configs
72  */
73 #define CONFIG_PMIC
74 #define CONFIG_PMIC_I2C
75 #define CONFIG_PMIC_FSL
76 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x08
77 #define CONFIG_RTC_MC13XXX
78 
79 /*
80  * MFD MC9SDZ60
81  */
82 #define CONFIG_FSL_MC9SDZ60
83 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR	0x69
84 
85 /*
86  * UART (console)
87  */
88 #define CONFIG_MXC_UART
89 #define CONFIG_MXC_UART_BASE	UART1_BASE
90 
91 /* allow to overwrite serial and ethaddr */
92 #define CONFIG_ENV_OVERWRITE
93 #define CONFIG_CONS_INDEX	1
94 #define CONFIG_BAUDRATE		115200
95 #define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
96 
97 /*
98  * Command definition
99  */
100 
101 #include <config_cmd_default.h>
102 
103 #define CONFIG_CMD_PING
104 #define CONFIG_CMD_DHCP
105 #define CONFIG_BOOTP_SUBNETMASK
106 #define CONFIG_BOOTP_GATEWAY
107 #define CONFIG_BOOTP_DNS
108 
109 #define CONFIG_CMD_NAND
110 #define CONFIG_CMD_CACHE
111 
112 #define CONFIG_CMD_I2C
113 #define CONFIG_CMD_SPI
114 #define CONFIG_CMD_MII
115 #define CONFIG_CMD_NET
116 #define CONFIG_NET_RETRY_COUNT	100
117 #define CONFIG_CMD_DATE
118 
119 #define CONFIG_BOOTDELAY	3
120 
121 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
122 
123 /*
124  * Ethernet on the debug board (SMC911)
125  */
126 #define CONFIG_SMC911X
127 #define CONFIG_SMC911X_16_BIT 1
128 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
129 
130 #define CONFIG_HAS_ETH1
131 #define CONFIG_ETHPRIME
132 
133 /*
134  * Ethernet on SOC (FEC)
135  */
136 #define CONFIG_FEC_MXC
137 #define IMX_FEC_BASE	FEC_BASE_ADDR
138 #define CONFIG_FEC_MXC_PHYADDR	0x1F
139 
140 #define CONFIG_MII
141 #define CONFIG_DISCOVER_PHY
142 
143 #define CONFIG_ARP_TIMEOUT	200UL
144 
145 /*
146  * Miscellaneous configurable options
147  */
148 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
149 #define CONFIG_SYS_PROMPT	"MX35 U-Boot > "
150 #define CONFIG_CMDLINE_EDITING
151 #define CONFIG_SYS_HUSH_PARSER	/* Use the HUSH parser */
152 #define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
153 
154 #define CONFIG_AUTO_COMPLETE
155 #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
156 /* Print Buffer Size */
157 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
158 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
159 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
160 
161 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
162 #define CONFIG_SYS_MEMTEST_END		0x10000
163 
164 #undef	CONFIG_SYS_CLKS_IN_HZ	/* everything, incl board info, in Hz */
165 
166 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
167 
168 #define CONFIG_SYS_HZ				1000
169 
170 
171 /*
172  * Stack sizes
173  *
174  * The stack sizes are set up in start.S using the settings below
175  */
176 #define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
177 
178 /*
179  * Physical Memory Map
180  */
181 #define CONFIG_NR_DRAM_BANKS	2
182 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
183 #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
184 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
185 #define PHYS_SDRAM_2_SIZE	(128 * 1024 * 1024)
186 
187 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
188 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
189 #define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
190 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
191 					GENERATED_GBL_DATA_SIZE)
192 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
193 					CONFIG_SYS_GBL_DATA_OFFSET)
194 
195 /*
196  * MTD Command for mtdparts
197  */
198 #define CONFIG_CMD_MTDPARTS
199 #define CONFIG_MTD_DEVICE
200 #define CONFIG_FLASH_CFI_MTD
201 #define CONFIG_MTD_PARTITIONS
202 #define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
203 #define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:1m(boot),5m(linux),"	\
204 				"96m(root),8m(cfg),1938m(user);"	\
205 				"physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
206 
207 /*
208  * FLASH and environment organization
209  */
210 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
211 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
212 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
213 /* Monitor at beginning of flash */
214 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
215 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
216 
217 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
218 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
219 
220 /* Address and size of Redundant Environment Sector	*/
221 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
222 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
223 
224 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
225 				CONFIG_SYS_MONITOR_LEN)
226 
227 #define CONFIG_ENV_IS_IN_FLASH
228 
229 #if defined(CONFIG_FSL_ENV_IN_NAND)
230 	#define CONFIG_ENV_IS_IN_NAND
231 	#define CONFIG_ENV_OFFSET       (1024 * 1024)
232 #endif
233 
234 /*
235  * CFI FLASH driver setup
236  */
237 #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
238 #define CONFIG_FLASH_CFI_DRIVER
239 
240 /* A non-standard buffered write algorithm */
241 #define CONFIG_FLASH_SPANSION_S29WS_N
242 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
243 #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
244 
245 /*
246  * NAND FLASH driver setup
247  */
248 #define CONFIG_NAND_MXC
249 #define CONFIG_NAND_MXC_V1_1
250 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
251 #define CONFIG_SYS_MAX_NAND_DEVICE	1
252 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
253 #define CONFIG_MXC_NAND_HWECC
254 #define CONFIG_SYS_NAND_LARGEPAGE
255 
256 /*
257  * Default environment and default scripts
258  * to update uboot and load kernel
259  */
260 #define xstr(s)	str(s)
261 #define str(s)	#s
262 
263 #define CONFIG_HOSTNAME "mx35pdk"
264 #define	CONFIG_EXTRA_ENV_SETTINGS					\
265 	"netdev=eth1\0"							\
266 	"ethprime=smc911x\0"						\
267 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
268 		"nfsroot=${serverip}:${rootpath}\0"			\
269 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
270 	"addip_sta=setenv bootargs ${bootargs} "			\
271 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
272 		":${hostname}:${netdev}:off panic=1\0"			\
273 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
274 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
275 		"else run addip_sta;fi\0"	\
276 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
277 	"addtty=setenv bootargs ${bootargs}"				\
278 		" console=ttymxc0,${baudrate}\0"			\
279 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
280 	"loadaddr=80800000\0"						\
281 	"kernel_addr_r=80800000\0"					\
282 	"hostname=" xstr(CONFIG_HOSTNAME) "\0"				\
283 	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
284 	"ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0"		\
285 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
286 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
287 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
288 		"bootm ${kernel_addr}\0"				\
289 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
290 		"run nfsargs addip addtty addmtd addmisc;"		\
291 		"bootm ${kernel_addr_r}\0"				\
292 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
293 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
294 	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0"			\
295 	"load=tftp ${loadaddr} ${u-boot}\0"				\
296 	"uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0"		\
297 	"update=protect off ${uboot_addr} +40000;"			\
298 		"erase ${uboot_addr} +40000;"				\
299 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
300 	"upd=if run load;then echo Updating u-boot;if run update;"	\
301 		"then echo U-Boot updated;"				\
302 			"else echo Error updating u-boot !;"		\
303 			"echo Board without bootloader !!;"		\
304 		"fi;"							\
305 		"else echo U-Boot not downloaded..exiting;fi\0"		\
306 	"bootcmd=run net_nfs\0"
307 
308 #endif				/* __CONFIG_H */
309