1eae4988bSStefano Babic /* 2eae4988bSStefano Babic * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 3eae4988bSStefano Babic * 4eae4988bSStefano Babic * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5eae4988bSStefano Babic * 6eae4988bSStefano Babic * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7eae4988bSStefano Babic * 8eae4988bSStefano Babic * Configuration for the MX35pdk Freescale board. 9eae4988bSStefano Babic * 101a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 11eae4988bSStefano Babic */ 12eae4988bSStefano Babic 13eae4988bSStefano Babic #ifndef __CONFIG_H 14eae4988bSStefano Babic #define __CONFIG_H 15eae4988bSStefano Babic 16eae4988bSStefano Babic #include <asm/arch/imx-regs.h> 17eae4988bSStefano Babic 18eae4988bSStefano Babic /* High Level Configuration Options */ 19eae4988bSStefano Babic #define CONFIG_MX35 20eae4988bSStefano Babic 21eae4988bSStefano Babic #define CONFIG_DISPLAY_CPUINFO 22e71f9d3dSStefano Babic #define CONFIG_SYS_GENERIC_BOARD 23eae4988bSStefano Babic 24eae4988bSStefano Babic /* Set TEXT at the beginning of the NOR flash */ 25eae4988bSStefano Babic #define CONFIG_SYS_TEXT_BASE 0xA0000000 26eae4988bSStefano Babic 27eae4988bSStefano Babic #define CONFIG_BOARD_EARLY_INIT_F 289660e442SHelmut Raiger #define CONFIG_BOARD_LATE_INIT 29eae4988bSStefano Babic 30eae4988bSStefano Babic #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 31eae4988bSStefano Babic #define CONFIG_REVISION_TAG 32eae4988bSStefano Babic #define CONFIG_SETUP_MEMORY_TAGS 33eae4988bSStefano Babic #define CONFIG_INITRD_TAG 34eae4988bSStefano Babic 35eae4988bSStefano Babic /* 36eae4988bSStefano Babic * Size of malloc() pool 37eae4988bSStefano Babic */ 38eae4988bSStefano Babic #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 39eae4988bSStefano Babic 40eae4988bSStefano Babic /* 41eae4988bSStefano Babic * Hardware drivers 42eae4988bSStefano Babic */ 43b089d039Strem #define CONFIG_SYS_I2C 44b089d039Strem #define CONFIG_SYS_I2C_MXC 45*03544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 46*03544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 47f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 48eae4988bSStefano Babic #define CONFIG_MXC_SPI 49a4adedd4SStefano Babic #define CONFIG_MXC_GPIO 50eae4988bSStefano Babic 51eae4988bSStefano Babic 52eae4988bSStefano Babic /* 53eae4988bSStefano Babic * PMIC Configs 54eae4988bSStefano Babic */ 55be3b51aaSŁukasz Majewski #define CONFIG_POWER 56be3b51aaSŁukasz Majewski #define CONFIG_POWER_I2C 57be3b51aaSŁukasz Majewski #define CONFIG_POWER_FSL 58913702caSSimon Glass #define CONFIG_POWER_FSL_MC13892 59eae4988bSStefano Babic #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 60d28d6a96SFabio Estevam #define CONFIG_RTC_MC13XXX 61eae4988bSStefano Babic 62eae4988bSStefano Babic /* 63eae4988bSStefano Babic * MFD MC9SDZ60 64eae4988bSStefano Babic */ 65eae4988bSStefano Babic #define CONFIG_FSL_MC9SDZ60 66eae4988bSStefano Babic #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 67eae4988bSStefano Babic 68eae4988bSStefano Babic /* 69eae4988bSStefano Babic * UART (console) 70eae4988bSStefano Babic */ 71eae4988bSStefano Babic #define CONFIG_MXC_UART 7240f6fffeSStefano Babic #define CONFIG_MXC_UART_BASE UART1_BASE 73eae4988bSStefano Babic 74eae4988bSStefano Babic /* allow to overwrite serial and ethaddr */ 75eae4988bSStefano Babic #define CONFIG_ENV_OVERWRITE 76eae4988bSStefano Babic #define CONFIG_CONS_INDEX 1 77eae4988bSStefano Babic #define CONFIG_BAUDRATE 115200 78eae4988bSStefano Babic 79eae4988bSStefano Babic /* 80eae4988bSStefano Babic * Command definition 81eae4988bSStefano Babic */ 828dd15b43SFabio Estevam #define CONFIG_OF_LIBFDT 83ee303c96SFabio Estevam #define CONFIG_CMD_BOOTZ 84eae4988bSStefano Babic #define CONFIG_CMD_PING 85eae4988bSStefano Babic #define CONFIG_CMD_DHCP 86eae4988bSStefano Babic #define CONFIG_BOOTP_SUBNETMASK 87eae4988bSStefano Babic #define CONFIG_BOOTP_GATEWAY 88eae4988bSStefano Babic #define CONFIG_BOOTP_DNS 89eae4988bSStefano Babic 90eae4988bSStefano Babic #define CONFIG_CMD_NAND 910792a36eSStefano Babic #define CONFIG_CMD_CACHE 92eae4988bSStefano Babic 93eae4988bSStefano Babic #define CONFIG_CMD_I2C 94eae4988bSStefano Babic #define CONFIG_CMD_SPI 95eae4988bSStefano Babic #define CONFIG_CMD_MII 96eae4988bSStefano Babic #define CONFIG_NET_RETRY_COUNT 100 97d28d6a96SFabio Estevam #define CONFIG_CMD_DATE 98eae4988bSStefano Babic 99961a7628SBenoît Thébaudeau #define CONFIG_CMD_USB 100961a7628SBenoît Thébaudeau #define CONFIG_USB_STORAGE 1013292539eSStefano Babic #define CONFIG_CMD_MMC 1023292539eSStefano Babic #define CONFIG_DOS_PARTITION 1033292539eSStefano Babic #define CONFIG_EFI_PARTITION 1043292539eSStefano Babic #define CONFIG_CMD_EXT2 1053292539eSStefano Babic #define CONFIG_CMD_FAT 1063292539eSStefano Babic 107ec7503bbSFabio Estevam #define CONFIG_BOOTDELAY 1 108eae4988bSStefano Babic 109eae4988bSStefano Babic #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 110eae4988bSStefano Babic 111eae4988bSStefano Babic /* 112eae4988bSStefano Babic * Ethernet on the debug board (SMC911) 113eae4988bSStefano Babic */ 114eae4988bSStefano Babic #define CONFIG_SMC911X 115eae4988bSStefano Babic #define CONFIG_SMC911X_16_BIT 1 116eae4988bSStefano Babic #define CONFIG_SMC911X_BASE CS5_BASE_ADDR 117eae4988bSStefano Babic 118eae4988bSStefano Babic #define CONFIG_HAS_ETH1 119eae4988bSStefano Babic #define CONFIG_ETHPRIME 120eae4988bSStefano Babic 121eae4988bSStefano Babic /* 122eae4988bSStefano Babic * Ethernet on SOC (FEC) 123eae4988bSStefano Babic */ 124eae4988bSStefano Babic #define CONFIG_FEC_MXC 125eae4988bSStefano Babic #define IMX_FEC_BASE FEC_BASE_ADDR 126eae4988bSStefano Babic #define CONFIG_FEC_MXC_PHYADDR 0x1F 127eae4988bSStefano Babic 128eae4988bSStefano Babic #define CONFIG_MII 129eae4988bSStefano Babic 130eae4988bSStefano Babic #define CONFIG_ARP_TIMEOUT 200UL 131eae4988bSStefano Babic 132eae4988bSStefano Babic /* 133eae4988bSStefano Babic * Miscellaneous configurable options 134eae4988bSStefano Babic */ 135eae4988bSStefano Babic #define CONFIG_SYS_LONGHELP /* undef to save memory */ 136eae4988bSStefano Babic #define CONFIG_CMDLINE_EDITING 137eae4988bSStefano Babic #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ 138eae4988bSStefano Babic 139eae4988bSStefano Babic #define CONFIG_AUTO_COMPLETE 140eae4988bSStefano Babic #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 141eae4988bSStefano Babic #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 142eae4988bSStefano Babic #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 143eae4988bSStefano Babic 144eae4988bSStefano Babic #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 145eae4988bSStefano Babic #define CONFIG_SYS_MEMTEST_END 0x10000 146eae4988bSStefano Babic 147eae4988bSStefano Babic #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 148eae4988bSStefano Babic 149eae4988bSStefano Babic /* 150eae4988bSStefano Babic * Physical Memory Map 151eae4988bSStefano Babic */ 1526b5acfc1SStefano Babic #define CONFIG_NR_DRAM_BANKS 2 153eae4988bSStefano Babic #define PHYS_SDRAM_1 CSD0_BASE_ADDR 154eae4988bSStefano Babic #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 1556b5acfc1SStefano Babic #define PHYS_SDRAM_2 CSD1_BASE_ADDR 1566b5acfc1SStefano Babic #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 157eae4988bSStefano Babic 158eae4988bSStefano Babic #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 159eae4988bSStefano Babic #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 160eae4988bSStefano Babic #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 161eae4988bSStefano Babic #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 162eae4988bSStefano Babic GENERATED_GBL_DATA_SIZE) 163eae4988bSStefano Babic #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 164eae4988bSStefano Babic CONFIG_SYS_GBL_DATA_OFFSET) 165eae4988bSStefano Babic 166eae4988bSStefano Babic /* 167eae4988bSStefano Babic * MTD Command for mtdparts 168eae4988bSStefano Babic */ 169eae4988bSStefano Babic #define CONFIG_CMD_MTDPARTS 170eae4988bSStefano Babic #define CONFIG_MTD_DEVICE 171eae4988bSStefano Babic #define CONFIG_FLASH_CFI_MTD 172eae4988bSStefano Babic #define CONFIG_MTD_PARTITIONS 173eae4988bSStefano Babic #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 174eae4988bSStefano Babic #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ 175eae4988bSStefano Babic "96m(root),8m(cfg),1938m(user);" \ 176eae4988bSStefano Babic "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" 177eae4988bSStefano Babic 178eae4988bSStefano Babic /* 179eae4988bSStefano Babic * FLASH and environment organization 180eae4988bSStefano Babic */ 181eae4988bSStefano Babic #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 182eae4988bSStefano Babic #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 183eae4988bSStefano Babic #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 184eae4988bSStefano Babic /* Monitor at beginning of flash */ 185eae4988bSStefano Babic #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 186eae4988bSStefano Babic #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 187eae4988bSStefano Babic 188eae4988bSStefano Babic #define CONFIG_ENV_SECT_SIZE (128 * 1024) 189eae4988bSStefano Babic #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 190eae4988bSStefano Babic 191eae4988bSStefano Babic /* Address and size of Redundant Environment Sector */ 192eae4988bSStefano Babic #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 193eae4988bSStefano Babic #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 194eae4988bSStefano Babic 195eae4988bSStefano Babic #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 196eae4988bSStefano Babic CONFIG_SYS_MONITOR_LEN) 197eae4988bSStefano Babic 198eae4988bSStefano Babic #define CONFIG_ENV_IS_IN_FLASH 199eae4988bSStefano Babic 200eae4988bSStefano Babic #if defined(CONFIG_FSL_ENV_IN_NAND) 201eae4988bSStefano Babic #define CONFIG_ENV_IS_IN_NAND 202eae4988bSStefano Babic #define CONFIG_ENV_OFFSET (1024 * 1024) 203eae4988bSStefano Babic #endif 204eae4988bSStefano Babic 205eae4988bSStefano Babic /* 206eae4988bSStefano Babic * CFI FLASH driver setup 207eae4988bSStefano Babic */ 208eae4988bSStefano Babic #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 209eae4988bSStefano Babic #define CONFIG_FLASH_CFI_DRIVER 210eae4988bSStefano Babic 211eae4988bSStefano Babic /* A non-standard buffered write algorithm */ 212eae4988bSStefano Babic #define CONFIG_FLASH_SPANSION_S29WS_N 213eae4988bSStefano Babic #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 214eae4988bSStefano Babic #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 215eae4988bSStefano Babic 216eae4988bSStefano Babic /* 217eae4988bSStefano Babic * NAND FLASH driver setup 218eae4988bSStefano Babic */ 219eae4988bSStefano Babic #define CONFIG_NAND_MXC 220eae4988bSStefano Babic #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 221eae4988bSStefano Babic #define CONFIG_SYS_MAX_NAND_DEVICE 1 222eae4988bSStefano Babic #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 223eae4988bSStefano Babic #define CONFIG_MXC_NAND_HWECC 224eae4988bSStefano Babic #define CONFIG_SYS_NAND_LARGEPAGE 225eae4988bSStefano Babic 226961a7628SBenoît Thébaudeau /* EHCI driver */ 227961a7628SBenoît Thébaudeau #define CONFIG_USB_EHCI 228961a7628SBenoît Thébaudeau #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 229961a7628SBenoît Thébaudeau #define CONFIG_EHCI_IS_TDI 230961a7628SBenoît Thébaudeau #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 231961a7628SBenoît Thébaudeau #define CONFIG_USB_EHCI_MXC 232961a7628SBenoît Thébaudeau #define CONFIG_MXC_USB_PORT 0 233961a7628SBenoît Thébaudeau #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ 234961a7628SBenoît Thébaudeau MXC_EHCI_POWER_PINS_ENABLED | \ 235961a7628SBenoît Thébaudeau MXC_EHCI_OC_PIN_ACTIVE_LOW) 236961a7628SBenoît Thébaudeau #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) 237961a7628SBenoît Thébaudeau 2383292539eSStefano Babic /* mmc driver */ 2393292539eSStefano Babic #define CONFIG_MMC 2403292539eSStefano Babic #define CONFIG_GENERIC_MMC 2413292539eSStefano Babic #define CONFIG_FSL_ESDHC 2423292539eSStefano Babic #define CONFIG_SYS_FSL_ESDHC_ADDR 0 2433292539eSStefano Babic #define CONFIG_SYS_FSL_ESDHC_NUM 1 2443292539eSStefano Babic 245eae4988bSStefano Babic /* 246eae4988bSStefano Babic * Default environment and default scripts 247eae4988bSStefano Babic * to update uboot and load kernel 248eae4988bSStefano Babic */ 249eae4988bSStefano Babic 250eae4988bSStefano Babic #define CONFIG_HOSTNAME "mx35pdk" 251eae4988bSStefano Babic #define CONFIG_EXTRA_ENV_SETTINGS \ 252eae4988bSStefano Babic "netdev=eth1\0" \ 253eae4988bSStefano Babic "ethprime=smc911x\0" \ 254eae4988bSStefano Babic "nfsargs=setenv bootargs root=/dev/nfs rw " \ 255eae4988bSStefano Babic "nfsroot=${serverip}:${rootpath}\0" \ 256eae4988bSStefano Babic "ramargs=setenv bootargs root=/dev/ram rw\0" \ 257eae4988bSStefano Babic "addip_sta=setenv bootargs ${bootargs} " \ 258eae4988bSStefano Babic "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 259eae4988bSStefano Babic ":${hostname}:${netdev}:off panic=1\0" \ 260eae4988bSStefano Babic "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 261eae4988bSStefano Babic "addip=if test -n ${ipdyn};then run addip_dyn;" \ 262eae4988bSStefano Babic "else run addip_sta;fi\0" \ 263eae4988bSStefano Babic "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 264eae4988bSStefano Babic "addtty=setenv bootargs ${bootargs}" \ 265eae4988bSStefano Babic " console=ttymxc0,${baudrate}\0" \ 266eae4988bSStefano Babic "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 267eae4988bSStefano Babic "loadaddr=80800000\0" \ 268eae4988bSStefano Babic "kernel_addr_r=80800000\0" \ 26993ea89f0SMarek Vasut "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 27093ea89f0SMarek Vasut "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 27193ea89f0SMarek Vasut "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 272eae4988bSStefano Babic "flash_self=run ramargs addip addtty addmtd addmisc;" \ 273eae4988bSStefano Babic "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 274eae4988bSStefano Babic "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 275eae4988bSStefano Babic "bootm ${kernel_addr}\0" \ 276eae4988bSStefano Babic "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 277eae4988bSStefano Babic "run nfsargs addip addtty addmtd addmisc;" \ 278eae4988bSStefano Babic "bootm ${kernel_addr_r}\0" \ 279eae4988bSStefano Babic "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 280eae4988bSStefano Babic "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 28193ea89f0SMarek Vasut "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 282eae4988bSStefano Babic "load=tftp ${loadaddr} ${u-boot}\0" \ 28393ea89f0SMarek Vasut "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 2843292539eSStefano Babic "update=protect off ${uboot_addr} +80000;" \ 2853292539eSStefano Babic "erase ${uboot_addr} +80000;" \ 286eae4988bSStefano Babic "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 287eae4988bSStefano Babic "upd=if run load;then echo Updating u-boot;if run update;" \ 288eae4988bSStefano Babic "then echo U-Boot updated;" \ 289eae4988bSStefano Babic "else echo Error updating u-boot !;" \ 290eae4988bSStefano Babic "echo Board without bootloader !!;" \ 291eae4988bSStefano Babic "fi;" \ 292eae4988bSStefano Babic "else echo U-Boot not downloaded..exiting;fi\0" \ 293eae4988bSStefano Babic "bootcmd=run net_nfs\0" 294eae4988bSStefano Babic 295eae4988bSStefano Babic #endif /* __CONFIG_H */ 296