1 /* 2 * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * Configuration settings for the MX31ADS Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 14 /* High Level Configuration Options */ 15 #define CONFIG_MX31 1 /* This is a mx31 */ 16 17 #define CONFIG_DISPLAY_CPUINFO 18 #define CONFIG_DISPLAY_BOARDINFO 19 20 #define CONFIG_SYS_TEXT_BASE 0xA0000000 21 22 #define CONFIG_MACH_TYPE MACH_TYPE_MX31ADS 23 24 /* 25 * Disabled for now due to build problems under Debian and a significant increase 26 * in the final file size: 144260 vs. 109536 Bytes. 27 */ 28 #if 0 29 #define CONFIG_OF_LIBFDT 1 30 #define CONFIG_FIT 1 31 #define CONFIG_FIT_VERBOSE 1 32 #endif 33 34 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 35 #define CONFIG_SETUP_MEMORY_TAGS 1 36 #define CONFIG_INITRD_TAG 1 37 38 /* 39 * Size of malloc() pool 40 */ 41 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 42 43 /* 44 * Hardware drivers 45 */ 46 47 #define CONFIG_MXC_UART 48 #define CONFIG_MXC_UART_BASE UART1_BASE 49 50 #define CONFIG_HARD_SPI 1 51 #define CONFIG_MXC_SPI 1 52 #define CONFIG_DEFAULT_SPI_BUS 1 53 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) 54 #define CONFIG_MXC_GPIO 55 56 /* PMIC Controller */ 57 #define CONFIG_POWER 58 #define CONFIG_POWER_SPI 59 #define CONFIG_POWER_FSL 60 #define CONFIG_FSL_PMIC_BUS 1 61 #define CONFIG_FSL_PMIC_CS 0 62 #define CONFIG_FSL_PMIC_CLK 1000000 63 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 64 #define CONFIG_FSL_PMIC_BITLEN 32 65 #define CONFIG_RTC_MC13XXX 66 67 /* allow to overwrite serial and ethaddr */ 68 #define CONFIG_ENV_OVERWRITE 69 #define CONFIG_CONS_INDEX 1 70 #define CONFIG_BAUDRATE 115200 71 72 /*********************************************************** 73 * Command definition 74 ***********************************************************/ 75 76 #include <config_cmd_default.h> 77 78 #define CONFIG_CMD_PING 79 #define CONFIG_CMD_DHCP 80 #define CONFIG_CMD_SPI 81 #define CONFIG_CMD_DATE 82 83 #define CONFIG_BOOTDELAY 3 84 85 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 86 87 #define CONFIG_EXTRA_ENV_SETTINGS \ 88 "netdev=eth0\0" \ 89 "uboot_addr=0xa0000000\0" \ 90 "uboot=mx31ads/u-boot.bin\0" \ 91 "kernel=mx31ads/uImage\0" \ 92 "nfsroot=/opt/eldk/arm\0" \ 93 "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ 94 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ 95 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 96 "bootcmd=run bootcmd_net\0" \ 97 "bootcmd_net=run bootargs_base bootargs_nfs; " \ 98 "tftpboot ${loadaddr} ${kernel}; bootm\0" \ 99 "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \ 100 "protect off ${uboot_addr} 0xa003ffff; " \ 101 "erase ${uboot_addr} 0xa003ffff; " \ 102 "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ 103 "setenv filesize; saveenv\0" 104 105 #define CONFIG_CS8900 106 #define CONFIG_CS8900_BASE 0xb4020300 107 #define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */ 108 109 /* 110 * The MX31ADS board seems to have a hardware "peculiarity" confirmed under 111 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A 112 * controller inverted. The controller is capable of detecting and correcting 113 * this, but it needs 4 network packets for that. Which means, at startup, you 114 * will not receive answers to the first 4 packest, unless there have been some 115 * broadcasts on the network, or your board is on a hub. Reducing the ARP 116 * timeout from default 5 seconds to 200ms we speed up the initial TFTP 117 * transfer, should the user wish one, significantly. 118 */ 119 #define CONFIG_ARP_TIMEOUT 200UL 120 121 /* 122 * Miscellaneous configurable options 123 */ 124 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 125 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 126 /* Print Buffer Size */ 127 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 128 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 129 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 130 131 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 132 #define CONFIG_SYS_MEMTEST_END 0x10000 133 134 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 135 136 #define CONFIG_CMDLINE_EDITING 1 137 138 /*----------------------------------------------------------------------- 139 * Physical Memory Map 140 */ 141 #define CONFIG_NR_DRAM_BANKS 1 142 #define PHYS_SDRAM_1 CSD0_BASE 143 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 144 #define CONFIG_BOARD_EARLY_INIT_F 145 146 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 147 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 148 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 149 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 150 GENERATED_GBL_DATA_SIZE) 151 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 152 CONFIG_SYS_GBL_DATA_OFFSET) 153 154 /*----------------------------------------------------------------------- 155 * FLASH and environment organization 156 */ 157 #define CONFIG_SYS_FLASH_BASE CS0_BASE 158 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 159 #define CONFIG_SYS_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ 160 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ 161 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ 162 163 #define CONFIG_ENV_IS_IN_FLASH 1 164 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 165 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 166 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 167 168 /* Address and size of Redundant Environment Sector */ 169 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) 170 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 171 172 173 /*----------------------------------------------------------------------- 174 * CFI FLASH driver setup 175 */ 176 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ 177 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ 178 #define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */ 179 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ 180 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ 181 182 /* 183 * JFFS2 partitions 184 */ 185 #undef CONFIG_CMD_MTDPARTS 186 #define CONFIG_JFFS2_DEV "nor0" 187 188 #endif /* __CONFIG_H */ 189