1 /* 2 * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * Configuration settings for the MX31ADS Freescale board. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 #include <asm/arch/imx-regs.h> 26 27 /* High Level Configuration Options */ 28 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ 29 #define CONFIG_MX31 1 /* in a mx31 */ 30 #define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */ 31 #define CONFIG_MX31_CLK32 32768 32 33 #define CONFIG_DISPLAY_CPUINFO 34 #define CONFIG_DISPLAY_BOARDINFO 35 36 /* 37 * Disabled for now due to build problems under Debian and a significant increase 38 * in the final file size: 144260 vs. 109536 Bytes. 39 */ 40 #if 0 41 #define CONFIG_OF_LIBFDT 1 42 #define CONFIG_FIT 1 43 #define CONFIG_FIT_VERBOSE 1 44 #endif 45 46 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 47 #define CONFIG_SETUP_MEMORY_TAGS 1 48 #define CONFIG_INITRD_TAG 1 49 50 /* 51 * Size of malloc() pool 52 */ 53 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 54 55 /* 56 * Hardware drivers 57 */ 58 59 #define CONFIG_MXC_UART 1 60 #define CONFIG_SYS_MX31_UART1 1 61 62 #define CONFIG_HARD_SPI 1 63 #define CONFIG_MXC_SPI 1 64 #define CONFIG_DEFAULT_SPI_BUS 1 65 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) 66 67 #define CONFIG_FSL_PMIC 68 #define CONFIG_FSL_PMIC_BUS 1 69 #define CONFIG_FSL_PMIC_CS 0 70 #define CONFIG_FSL_PMIC_CLK 1000000 71 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 72 #define CONFIG_RTC_MC13783 1 73 74 /* allow to overwrite serial and ethaddr */ 75 #define CONFIG_ENV_OVERWRITE 76 #define CONFIG_CONS_INDEX 1 77 #define CONFIG_BAUDRATE 115200 78 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 79 80 /*********************************************************** 81 * Command definition 82 ***********************************************************/ 83 84 #include <config_cmd_default.h> 85 86 #define CONFIG_CMD_PING 87 #define CONFIG_CMD_DHCP 88 #define CONFIG_CMD_SPI 89 #define CONFIG_CMD_DATE 90 91 #define CONFIG_BOOTDELAY 3 92 93 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 94 95 #define CONFIG_EXTRA_ENV_SETTINGS \ 96 "netdev=eth0\0" \ 97 "uboot_addr=0xa0000000\0" \ 98 "uboot=mx31ads/u-boot.bin\0" \ 99 "kernel=mx31ads/uImage\0" \ 100 "nfsroot=/opt/eldk/arm\0" \ 101 "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ 102 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ 103 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 104 "bootcmd=run bootcmd_net\0" \ 105 "bootcmd_net=run bootargs_base bootargs_nfs; " \ 106 "tftpboot ${loadaddr} ${kernel}; bootm\0" \ 107 "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \ 108 "protect off ${uboot_addr} 0xa003ffff; " \ 109 "erase ${uboot_addr} 0xa003ffff; " \ 110 "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ 111 "setenv filesize; saveenv\0" 112 113 #define CONFIG_NET_MULTI 114 #define CONFIG_CS8900 115 #define CONFIG_CS8900_BASE 0xb4020300 116 #define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */ 117 118 /* 119 * The MX31ADS board seems to have a hardware "peculiarity" confirmed under 120 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A 121 * controller inverted. The controller is capable of detecting and correcting 122 * this, but it needs 4 network packets for that. Which means, at startup, you 123 * will not receive answers to the first 4 packest, unless there have been some 124 * broadcasts on the network, or your board is on a hub. Reducing the ARP 125 * timeout from default 5 seconds to 200ms we speed up the initial TFTP 126 * transfer, should the user wish one, significantly. 127 */ 128 #define CONFIG_ARP_TIMEOUT 200UL 129 130 /* 131 * Miscellaneous configurable options 132 */ 133 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 134 #define CONFIG_SYS_PROMPT "=> " 135 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 136 /* Print Buffer Size */ 137 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 138 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 139 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 140 141 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 142 #define CONFIG_SYS_MEMTEST_END 0x10000 143 144 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 145 146 #define CONFIG_SYS_HZ 1000 147 148 #define CONFIG_CMDLINE_EDITING 1 149 150 /*----------------------------------------------------------------------- 151 * Stack sizes 152 * 153 * The stack sizes are set up in start.S using the settings below 154 */ 155 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 156 157 /*----------------------------------------------------------------------- 158 * Physical Memory Map 159 */ 160 #define CONFIG_NR_DRAM_BANKS 1 161 #define PHYS_SDRAM_1 CSD0_BASE 162 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 163 164 /*----------------------------------------------------------------------- 165 * FLASH and environment organization 166 */ 167 #define CONFIG_SYS_FLASH_BASE CS0_BASE 168 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 169 #define CONFIG_SYS_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ 170 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ 171 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ 172 173 #define CONFIG_ENV_IS_IN_FLASH 1 174 #define CONFIG_ENV_SECT_SIZE (32 * 1024) 175 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 176 177 /* Address and size of Redundant Environment Sector */ 178 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 179 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 180 181 /* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end. 182 * The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors, 183 * if we put environment next to it, we will have to occupy 128KiB for it. 184 * Putting it at the top of flash we use only 32KiB. */ 185 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_ENV_SECT_SIZE) 186 187 /*----------------------------------------------------------------------- 188 * CFI FLASH driver setup 189 */ 190 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ 191 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ 192 #define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */ 193 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ 194 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ 195 196 /* 197 * JFFS2 partitions 198 */ 199 #undef CONFIG_CMD_MTDPARTS 200 #define CONFIG_JFFS2_DEV "nor0" 201 202 #endif /* __CONFIG_H */ 203