1 /* 2 * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * Configuration settings for the MX31ADS Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 14 /* High Level Configuration Options */ 15 #define CONFIG_MX31 1 /* This is a mx31 */ 16 17 18 #define CONFIG_DISPLAY_CPUINFO 19 #define CONFIG_DISPLAY_BOARDINFO 20 21 #define CONFIG_SYS_TEXT_BASE 0xA0000000 22 23 #define CONFIG_MACH_TYPE MACH_TYPE_MX31ADS 24 25 /* 26 * Disabled for now due to build problems under Debian and a significant increase 27 * in the final file size: 144260 vs. 109536 Bytes. 28 */ 29 #if 0 30 #define CONFIG_OF_LIBFDT 1 31 #define CONFIG_FIT 1 32 #define CONFIG_FIT_VERBOSE 1 33 #endif 34 35 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 36 #define CONFIG_SETUP_MEMORY_TAGS 1 37 #define CONFIG_INITRD_TAG 1 38 39 /* 40 * Size of malloc() pool 41 */ 42 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 43 44 /* 45 * Hardware drivers 46 */ 47 48 #define CONFIG_MXC_UART 49 #define CONFIG_MXC_UART_BASE UART1_BASE 50 51 #define CONFIG_HARD_SPI 1 52 #define CONFIG_MXC_SPI 1 53 #define CONFIG_DEFAULT_SPI_BUS 1 54 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) 55 #define CONFIG_MXC_GPIO 56 57 /* PMIC Controller */ 58 #define CONFIG_POWER 59 #define CONFIG_POWER_SPI 60 #define CONFIG_POWER_FSL 61 #define CONFIG_FSL_PMIC_BUS 1 62 #define CONFIG_FSL_PMIC_CS 0 63 #define CONFIG_FSL_PMIC_CLK 1000000 64 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 65 #define CONFIG_FSL_PMIC_BITLEN 32 66 #define CONFIG_RTC_MC13XXX 67 68 /* allow to overwrite serial and ethaddr */ 69 #define CONFIG_ENV_OVERWRITE 70 #define CONFIG_CONS_INDEX 1 71 #define CONFIG_BAUDRATE 115200 72 73 /*********************************************************** 74 * Command definition 75 ***********************************************************/ 76 #define CONFIG_CMD_PING 77 #define CONFIG_CMD_DHCP 78 #define CONFIG_CMD_SPI 79 #define CONFIG_CMD_DATE 80 81 #define CONFIG_BOOTDELAY 3 82 83 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 84 85 #define CONFIG_EXTRA_ENV_SETTINGS \ 86 "netdev=eth0\0" \ 87 "uboot_addr=0xa0000000\0" \ 88 "uboot=mx31ads/u-boot.bin\0" \ 89 "kernel=mx31ads/uImage\0" \ 90 "nfsroot=/opt/eldk/arm\0" \ 91 "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ 92 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ 93 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 94 "bootcmd=run bootcmd_net\0" \ 95 "bootcmd_net=run bootargs_base bootargs_nfs; " \ 96 "tftpboot ${loadaddr} ${kernel}; bootm\0" \ 97 "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \ 98 "protect off ${uboot_addr} 0xa003ffff; " \ 99 "erase ${uboot_addr} 0xa003ffff; " \ 100 "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ 101 "setenv filesize; saveenv\0" 102 103 #define CONFIG_CS8900 104 #define CONFIG_CS8900_BASE 0xb4020300 105 #define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */ 106 107 /* 108 * The MX31ADS board seems to have a hardware "peculiarity" confirmed under 109 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A 110 * controller inverted. The controller is capable of detecting and correcting 111 * this, but it needs 4 network packets for that. Which means, at startup, you 112 * will not receive answers to the first 4 packest, unless there have been some 113 * broadcasts on the network, or your board is on a hub. Reducing the ARP 114 * timeout from default 5 seconds to 200ms we speed up the initial TFTP 115 * transfer, should the user wish one, significantly. 116 */ 117 #define CONFIG_ARP_TIMEOUT 200UL 118 119 /* 120 * Miscellaneous configurable options 121 */ 122 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 123 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 124 /* Print Buffer Size */ 125 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 126 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 127 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 128 129 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 130 #define CONFIG_SYS_MEMTEST_END 0x10000 131 132 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 133 134 #define CONFIG_CMDLINE_EDITING 1 135 136 /*----------------------------------------------------------------------- 137 * Physical Memory Map 138 */ 139 #define CONFIG_NR_DRAM_BANKS 1 140 #define PHYS_SDRAM_1 CSD0_BASE 141 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 142 #define CONFIG_BOARD_EARLY_INIT_F 143 144 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 145 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 146 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 147 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 148 GENERATED_GBL_DATA_SIZE) 149 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 150 CONFIG_SYS_GBL_DATA_OFFSET) 151 152 /*----------------------------------------------------------------------- 153 * FLASH and environment organization 154 */ 155 #define CONFIG_SYS_FLASH_BASE CS0_BASE 156 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 157 #define CONFIG_SYS_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ 158 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ 159 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ 160 161 #define CONFIG_ENV_IS_IN_FLASH 1 162 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 163 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 164 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 165 166 /* Address and size of Redundant Environment Sector */ 167 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) 168 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 169 170 171 /*----------------------------------------------------------------------- 172 * CFI FLASH driver setup 173 */ 174 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ 175 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ 176 #define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */ 177 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ 178 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ 179 180 /* 181 * JFFS2 partitions 182 */ 183 #undef CONFIG_CMD_MTDPARTS 184 #define CONFIG_JFFS2_DEV "nor0" 185 186 #endif /* __CONFIG_H */ 187