1 /* 2 * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * Configuration settings for the MX31ADS Freescale board. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 #include <asm/arch/imx-regs.h> 26 27 /* High Level Configuration Options */ 28 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ 29 #define CONFIG_MX31 1 /* in a mx31 */ 30 #define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */ 31 #define CONFIG_MX31_CLK32 32768 32 33 #define CONFIG_DISPLAY_CPUINFO 34 #define CONFIG_DISPLAY_BOARDINFO 35 36 #define CONFIG_SYS_TEXT_BASE 0xA0000000 37 38 /* 39 * Disabled for now due to build problems under Debian and a significant increase 40 * in the final file size: 144260 vs. 109536 Bytes. 41 */ 42 #if 0 43 #define CONFIG_OF_LIBFDT 1 44 #define CONFIG_FIT 1 45 #define CONFIG_FIT_VERBOSE 1 46 #endif 47 48 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 49 #define CONFIG_SETUP_MEMORY_TAGS 1 50 #define CONFIG_INITRD_TAG 1 51 52 /* 53 * Size of malloc() pool 54 */ 55 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 56 57 /* 58 * Hardware drivers 59 */ 60 61 #define CONFIG_MXC_UART 1 62 #define CONFIG_SYS_MX31_UART1 1 63 64 #define CONFIG_HARD_SPI 1 65 #define CONFIG_MXC_SPI 1 66 #define CONFIG_DEFAULT_SPI_BUS 1 67 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) 68 #define CONFIG_MXC_GPIO 69 70 #define CONFIG_FSL_PMIC 71 #define CONFIG_FSL_PMIC_BUS 1 72 #define CONFIG_FSL_PMIC_CS 0 73 #define CONFIG_FSL_PMIC_CLK 1000000 74 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 75 #define CONFIG_RTC_MC13783 1 76 77 /* allow to overwrite serial and ethaddr */ 78 #define CONFIG_ENV_OVERWRITE 79 #define CONFIG_CONS_INDEX 1 80 #define CONFIG_BAUDRATE 115200 81 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 82 83 /*********************************************************** 84 * Command definition 85 ***********************************************************/ 86 87 #include <config_cmd_default.h> 88 89 #define CONFIG_CMD_PING 90 #define CONFIG_CMD_DHCP 91 #define CONFIG_CMD_SPI 92 #define CONFIG_CMD_DATE 93 94 #define CONFIG_BOOTDELAY 3 95 96 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 97 98 #define CONFIG_EXTRA_ENV_SETTINGS \ 99 "netdev=eth0\0" \ 100 "uboot_addr=0xa0000000\0" \ 101 "uboot=mx31ads/u-boot.bin\0" \ 102 "kernel=mx31ads/uImage\0" \ 103 "nfsroot=/opt/eldk/arm\0" \ 104 "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ 105 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ 106 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 107 "bootcmd=run bootcmd_net\0" \ 108 "bootcmd_net=run bootargs_base bootargs_nfs; " \ 109 "tftpboot ${loadaddr} ${kernel}; bootm\0" \ 110 "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \ 111 "protect off ${uboot_addr} 0xa003ffff; " \ 112 "erase ${uboot_addr} 0xa003ffff; " \ 113 "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ 114 "setenv filesize; saveenv\0" 115 116 #define CONFIG_NET_MULTI 117 #define CONFIG_CS8900 118 #define CONFIG_CS8900_BASE 0xb4020300 119 #define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */ 120 121 /* 122 * The MX31ADS board seems to have a hardware "peculiarity" confirmed under 123 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A 124 * controller inverted. The controller is capable of detecting and correcting 125 * this, but it needs 4 network packets for that. Which means, at startup, you 126 * will not receive answers to the first 4 packest, unless there have been some 127 * broadcasts on the network, or your board is on a hub. Reducing the ARP 128 * timeout from default 5 seconds to 200ms we speed up the initial TFTP 129 * transfer, should the user wish one, significantly. 130 */ 131 #define CONFIG_ARP_TIMEOUT 200UL 132 133 /* 134 * Miscellaneous configurable options 135 */ 136 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 137 #define CONFIG_SYS_PROMPT "=> " 138 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 139 /* Print Buffer Size */ 140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 141 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 142 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 143 144 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 145 #define CONFIG_SYS_MEMTEST_END 0x10000 146 147 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 148 149 #define CONFIG_SYS_HZ 1000 150 151 #define CONFIG_CMDLINE_EDITING 1 152 153 /*----------------------------------------------------------------------- 154 * Stack sizes 155 * 156 * The stack sizes are set up in start.S using the settings below 157 */ 158 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 159 160 /*----------------------------------------------------------------------- 161 * Physical Memory Map 162 */ 163 #define CONFIG_NR_DRAM_BANKS 1 164 #define PHYS_SDRAM_1 CSD0_BASE 165 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 166 #define CONFIG_BOARD_EARLY_INIT_F 167 168 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 169 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 170 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 171 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 172 GENERATED_GBL_DATA_SIZE) 173 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 174 CONFIG_SYS_GBL_DATA_OFFSET) 175 176 /*----------------------------------------------------------------------- 177 * FLASH and environment organization 178 */ 179 #define CONFIG_SYS_FLASH_BASE CS0_BASE 180 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 181 #define CONFIG_SYS_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ 182 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ 183 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ 184 185 #define CONFIG_ENV_IS_IN_FLASH 1 186 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 187 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 188 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 189 190 /* Address and size of Redundant Environment Sector */ 191 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) 192 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 193 194 195 /*----------------------------------------------------------------------- 196 * CFI FLASH driver setup 197 */ 198 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ 199 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ 200 #define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */ 201 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ 202 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ 203 204 /* 205 * JFFS2 partitions 206 */ 207 #undef CONFIG_CMD_MTDPARTS 208 #define CONFIG_JFFS2_DEV "nor0" 209 210 #endif /* __CONFIG_H */ 211