xref: /rk3399_rockchip-uboot/include/configs/mx31ads.h (revision 4c2e3da82dc2b7f8b39b7f1d57f570e4bc5caa6d)
1 /*
2  * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
3  *
4  * Configuration settings for the MX31ADS Freescale board.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21 
22 #ifndef __CONFIG_H
23 #define __CONFIG_H
24 
25 #include <asm/arch/mx31-regs.h>
26 
27  /* High Level Configuration Options */
28 #define CONFIG_ARM1136		1		/* This is an arm1136 CPU core */
29 #define CONFIG_MX31		1		/* in a mx31 */
30 #define CONFIG_MX31_HCLK_FREQ	26000000	/* RedBoot says 26MHz */
31 #define CONFIG_MX31_CLK32	32768
32 
33 #define CONFIG_DISPLAY_CPUINFO
34 #define CONFIG_DISPLAY_BOARDINFO
35 
36 /*
37  * Disabled for now due to build problems under Debian and a significant increase
38  * in the final file size: 144260 vs. 109536 Bytes.
39  */
40 #if 0
41 #define CONFIG_OF_LIBFDT		1
42 #define CONFIG_FIT			1
43 #define CONFIG_FIT_VERBOSE		1
44 #endif
45 
46 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
47 #define CONFIG_SETUP_MEMORY_TAGS	1
48 #define CONFIG_INITRD_TAG		1
49 
50 /*
51  * Size of malloc() pool
52  */
53 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
54 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
55 
56 /*
57  * Hardware drivers
58  */
59 
60 #define CONFIG_MXC_UART	1
61 #define CONFIG_SYS_MX31_UART1		1
62 
63 #define CONFIG_HARD_SPI		1
64 #define CONFIG_MXC_SPI		1
65 #define CONFIG_DEFAULT_SPI_BUS	1
66 #define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)
67 
68 #define CONFIG_RTC_MC13783	1
69 /* MC13783 connected to CSPI2 and SS0 */
70 #define CONFIG_MC13783_SPI_BUS	1
71 #define CONFIG_MC13783_SPI_CS	0
72 
73 /* allow to overwrite serial and ethaddr */
74 #define CONFIG_ENV_OVERWRITE
75 #define CONFIG_CONS_INDEX	1
76 #define CONFIG_BAUDRATE		115200
77 #define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
78 
79 /***********************************************************
80  * Command definition
81  ***********************************************************/
82 
83 #include <config_cmd_default.h>
84 
85 #define CONFIG_CMD_PING
86 #define CONFIG_CMD_DHCP
87 #define CONFIG_CMD_SPI
88 #define CONFIG_CMD_DATE
89 
90 #define CONFIG_BOOTDELAY	3
91 
92 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
93 
94 #define	CONFIG_EXTRA_ENV_SETTINGS					\
95 	"netdev=eth0\0"							\
96 	"uboot_addr=0xa0000000\0"					\
97 	"uboot=mx31ads/u-boot.bin\0"					\
98 	"kernel=mx31ads/uImage\0"					\
99 	"nfsroot=/opt/eldk/arm\0"					\
100 	"bootargs_base=setenv bootargs console=ttymxc0,115200\0"	\
101 	"bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "	\
102 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"	\
103 	"bootcmd=run bootcmd_net\0"					\
104 	"bootcmd_net=run bootargs_base bootargs_nfs; "			\
105 		"tftpboot ${loadaddr} ${kernel}; bootm\0"		\
106 	"prg_uboot=tftpboot ${loadaddr} ${uboot}; "			\
107 		"protect off ${uboot_addr} 0xa003ffff; "		\
108 		"erase ${uboot_addr} 0xa003ffff; "			\
109 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}; "		\
110 		"setenv filesize; saveenv\0"
111 
112 #define CONFIG_DRIVER_CS8900	1
113 #define CS8900_BASE		0xb4020300
114 #define CS8900_BUS16		1	/* follow the Linux driver */
115 
116 /*
117  * The MX31ADS board seems to have a hardware "peculiarity" confirmed under
118  * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
119  * controller inverted. The controller is capable of detecting and correcting
120  * this, but it needs 4 network packets for that. Which means, at startup, you
121  * will not receive answers to the first 4 packest, unless there have been some
122  * broadcasts on the network, or your board is on a hub. Reducing the ARP
123  * timeout from default 5 seconds to 200ms we speed up the initial TFTP
124  * transfer, should the user wish one, significantly.
125  */
126 #define CONFIG_ARP_TIMEOUT	200UL
127 
128 /*
129  * Miscellaneous configurable options
130  */
131 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
132 #define CONFIG_SYS_PROMPT		"=> "
133 #define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size */
134 /* Print Buffer Size */
135 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
136 #define CONFIG_SYS_MAXARGS		16		/* max number of command args */
137 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */
138 
139 #define CONFIG_SYS_MEMTEST_START	0		/* memtest works on */
140 #define CONFIG_SYS_MEMTEST_END		0x10000
141 
142 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
143 
144 #define CONFIG_SYS_HZ			1000
145 
146 #define CONFIG_CMDLINE_EDITING	1
147 
148 /*-----------------------------------------------------------------------
149  * Stack sizes
150  *
151  * The stack sizes are set up in start.S using the settings below
152  */
153 #define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
154 
155 /*-----------------------------------------------------------------------
156  * Physical Memory Map
157  */
158 #define CONFIG_NR_DRAM_BANKS	1
159 #define PHYS_SDRAM_1		CSD0_BASE
160 #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
161 
162 /*-----------------------------------------------------------------------
163  * FLASH and environment organization
164  */
165 #define CONFIG_SYS_FLASH_BASE		CS0_BASE
166 #define CONFIG_SYS_MAX_FLASH_BANKS	1		/* max number of memory banks */
167 #define CONFIG_SYS_MAX_FLASH_SECT	262		/* max number of sectors on one chip */
168 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE	/* Monitor at beginning of flash */
169 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)	/* Reserve 256KiB */
170 
171 #define	CONFIG_ENV_IS_IN_FLASH	1
172 #define CONFIG_ENV_SECT_SIZE	(32 * 1024)
173 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
174 
175 /* Address and size of Redundant Environment Sector	*/
176 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
177 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
178 
179 /* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end.
180  * The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors,
181  * if we put environment next to it, we will have to occupy 128KiB for it.
182  * Putting it at the top of flash we use only 32KiB. */
183 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_ENV_SECT_SIZE)
184 
185 /*-----------------------------------------------------------------------
186  * CFI FLASH driver setup
187  */
188 #define CONFIG_SYS_FLASH_CFI			1 /* Flash memory is CFI compliant */
189 #define CONFIG_FLASH_CFI_DRIVER		1 /* Use drivers/cfi_flash.c */
190 #define CONFIG_FLASH_SPANSION_S29WS_N	1 /* A non-standard buffered write algorithm */
191 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1 /* Use buffered writes (~10x faster) */
192 #define CONFIG_SYS_FLASH_PROTECTION		1 /* Use hardware sector protection */
193 
194 /*
195  * JFFS2 partitions
196  */
197 #undef CONFIG_CMD_MTDPARTS
198 #define CONFIG_JFFS2_DEV	"nor0"
199 
200 #endif /* __CONFIG_H */
201