1 /* 2 * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * Configuration settings for the MX31ADS Freescale board. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 #include <asm/arch/mx31-regs.h> 26 27 /* High Level Configuration Options */ 28 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ 29 #define CONFIG_MX31 1 /* in a mx31 */ 30 #define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */ 31 #define CONFIG_MX31_CLK32 32000 32 33 #define CONFIG_DISPLAY_CPUINFO 34 #define CONFIG_DISPLAY_BOARDINFO 35 36 /* 37 * Disabled for now due to build problems under Debian and a significant increase 38 * in the final file size: 144260 vs. 109536 Bytes. 39 */ 40 #if 0 41 #define CONFIG_OF_LIBFDT 1 42 #define CONFIG_FIT 1 43 #define CONFIG_FIT_VERBOSE 1 44 #endif 45 46 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 47 #define CONFIG_SETUP_MEMORY_TAGS 1 48 #define CONFIG_INITRD_TAG 1 49 50 /* 51 * Size of malloc() pool 52 */ 53 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024) 54 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 55 56 /* 57 * Hardware drivers 58 */ 59 60 #define CONFIG_MX31_UART 1 61 #define CFG_MX31_UART1 1 62 63 #define CONFIG_HARD_SPI 1 64 #define CONFIG_MXC_SPI 1 65 #define CONFIG_MXC_SPI_IFACE 1 /* Default SPI interface number */ 66 67 #define CONFIG_RTC_MC13783 1 68 69 /* allow to overwrite serial and ethaddr */ 70 #define CONFIG_ENV_OVERWRITE 71 #define CONFIG_CONS_INDEX 1 72 #define CONFIG_BAUDRATE 115200 73 #define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 74 75 /*********************************************************** 76 * Command definition 77 ***********************************************************/ 78 79 #include <config_cmd_default.h> 80 81 #define CONFIG_CMD_PING 82 #define CONFIG_CMD_SPI 83 #define CONFIG_CMD_DATE 84 85 #define CONFIG_BOOTDELAY 3 86 87 #define CONFIG_NETMASK 255.255.255.0 88 #define CONFIG_IPADDR 192.168.23.168 89 #define CONFIG_SERVERIP 192.168.23.2 90 #define CONFIG_LOADADDR (CSD0_BASE + 0x800000) /* loadaddr env var */ 91 92 #define CONFIG_EXTRA_ENV_SETTINGS \ 93 "netdev=eth0\0" \ 94 "uboot_addr=0xa0000000\0" \ 95 "uboot=mx31ads/u-boot.bin\0" \ 96 "kernel=mx31ads/uImage\0" \ 97 "nfsroot=/opt/eldk/arm\0" \ 98 "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ 99 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ 100 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 101 "bootcmd=run bootcmd_net\0" \ 102 "bootcmd_net=run bootargs_base bootargs_nfs; " \ 103 "tftpboot ${loadaddr} ${kernel}; bootm\0" \ 104 "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \ 105 "protect off ${uboot_addr} 0xa003ffff; " \ 106 "erase ${uboot_addr} 0xa003ffff; " \ 107 "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ 108 "setenv filesize; saveenv\0" 109 110 #define CONFIG_DRIVER_CS8900 1 111 #define CS8900_BASE 0xb4020300 112 #define CS8900_BUS16 1 /* follow the Linux driver */ 113 114 /* 115 * The MX31ADS board seems to have a hardware "peculiarity" confirmed under 116 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A 117 * controller inverted. The controller is capable of detecting and correcting 118 * this, but it needs 4 network packets for that. Which means, at startup, you 119 * will not receive answers to the first 4 packest, unless there have been some 120 * broadcasts on the network, or your board is on a hub. Reducing the ARP 121 * timeout from default 5 seconds to 200ms we speed up the initial TFTP 122 * transfer, should the user wish one, significantly. 123 */ 124 #define CONFIG_ARP_TIMEOUT 200UL 125 126 /* 127 * Miscellaneous configurable options 128 */ 129 #define CFG_LONGHELP /* undef to save memory */ 130 #define CFG_PROMPT "=> " 131 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 132 /* Print Buffer Size */ 133 #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) 134 #define CFG_MAXARGS 16 /* max number of command args */ 135 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ 136 137 #define CFG_MEMTEST_START 0 /* memtest works on */ 138 #define CFG_MEMTEST_END 0x10000 139 140 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ 141 142 #define CFG_LOAD_ADDR CONFIG_LOADADDR 143 144 #define CFG_HZ 32000 145 146 #define CONFIG_CMDLINE_EDITING 1 147 148 /*----------------------------------------------------------------------- 149 * Stack sizes 150 * 151 * The stack sizes are set up in start.S using the settings below 152 */ 153 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 154 155 /*----------------------------------------------------------------------- 156 * Physical Memory Map 157 */ 158 #define CONFIG_NR_DRAM_BANKS 1 159 #define PHYS_SDRAM_1 CSD0_BASE 160 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 161 162 /*----------------------------------------------------------------------- 163 * FLASH and environment organization 164 */ 165 #define CFG_FLASH_BASE CS0_BASE 166 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 167 #define CFG_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ 168 #define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */ 169 #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ 170 171 #define CFG_ENV_IS_IN_FLASH 1 172 #define CFG_ENV_SECT_SIZE (32 * 1024) 173 #define CFG_ENV_SIZE CFG_ENV_SECT_SIZE 174 175 /* Address and size of Redundant Environment Sector */ 176 #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE) 177 #define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE 178 179 /* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end. 180 * The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors, 181 * if we put environment next to it, we will have to occupy 128KiB for it. 182 * Putting it at the top of flash we use only 32KiB. */ 183 #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_ENV_SECT_SIZE) 184 185 /*----------------------------------------------------------------------- 186 * CFI FLASH driver setup 187 */ 188 #define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */ 189 #define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ 190 #define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */ 191 #define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ 192 #define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */ 193 194 /* 195 * JFFS2 partitions 196 */ 197 #undef CONFIG_JFFS2_CMDLINE 198 #define CONFIG_JFFS2_DEV "nor0" 199 200 #endif /* __CONFIG_H */ 201