1b5dc9b30SGuennadi Liakhovetski /* 2b5dc9b30SGuennadi Liakhovetski * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de> 3b5dc9b30SGuennadi Liakhovetski * 4b5dc9b30SGuennadi Liakhovetski * Configuration settings for the MX31ADS Freescale board. 5b5dc9b30SGuennadi Liakhovetski * 6b5dc9b30SGuennadi Liakhovetski * This program is free software; you can redistribute it and/or 7b5dc9b30SGuennadi Liakhovetski * modify it under the terms of the GNU General Public License as 8b5dc9b30SGuennadi Liakhovetski * published by the Free Software Foundation; either version 2 of 9b5dc9b30SGuennadi Liakhovetski * the License, or (at your option) any later version. 10b5dc9b30SGuennadi Liakhovetski * 11b5dc9b30SGuennadi Liakhovetski * This program is distributed in the hope that it will be useful, 12b5dc9b30SGuennadi Liakhovetski * but WITHOUT ANY WARRANTY; without even the implied warranty of 13b5dc9b30SGuennadi Liakhovetski * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14b5dc9b30SGuennadi Liakhovetski * GNU General Public License for more details. 15b5dc9b30SGuennadi Liakhovetski * 16b5dc9b30SGuennadi Liakhovetski * You should have received a copy of the GNU General Public License 17b5dc9b30SGuennadi Liakhovetski * along with this program; if not, write to the Free Software 18b5dc9b30SGuennadi Liakhovetski * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19b5dc9b30SGuennadi Liakhovetski * MA 02111-1307 USA 20b5dc9b30SGuennadi Liakhovetski */ 21b5dc9b30SGuennadi Liakhovetski 22b5dc9b30SGuennadi Liakhovetski #ifndef __CONFIG_H 23b5dc9b30SGuennadi Liakhovetski #define __CONFIG_H 24b5dc9b30SGuennadi Liakhovetski 25b5dc9b30SGuennadi Liakhovetski #include <asm/arch/mx31-regs.h> 26b5dc9b30SGuennadi Liakhovetski 27b5dc9b30SGuennadi Liakhovetski /* High Level Configuration Options */ 28b5dc9b30SGuennadi Liakhovetski #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ 29b5dc9b30SGuennadi Liakhovetski #define CONFIG_MX31 1 /* in a mx31 */ 30b5dc9b30SGuennadi Liakhovetski #define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */ 31b5dc9b30SGuennadi Liakhovetski #define CONFIG_MX31_CLK32 32000 32b5dc9b30SGuennadi Liakhovetski 33b5dc9b30SGuennadi Liakhovetski #define CONFIG_DISPLAY_CPUINFO 34b5dc9b30SGuennadi Liakhovetski #define CONFIG_DISPLAY_BOARDINFO 35b5dc9b30SGuennadi Liakhovetski 36b5dc9b30SGuennadi Liakhovetski /* 37b5dc9b30SGuennadi Liakhovetski * Disabled for now due to build problems under Debian and a significant increase 38b5dc9b30SGuennadi Liakhovetski * in the final file size: 144260 vs. 109536 Bytes. 39b5dc9b30SGuennadi Liakhovetski */ 40b5dc9b30SGuennadi Liakhovetski #if 0 41b5dc9b30SGuennadi Liakhovetski #define CONFIG_OF_LIBFDT 1 42b5dc9b30SGuennadi Liakhovetski #define CONFIG_FIT 1 43b5dc9b30SGuennadi Liakhovetski #define CONFIG_FIT_VERBOSE 1 44b5dc9b30SGuennadi Liakhovetski #endif 45b5dc9b30SGuennadi Liakhovetski 46b5dc9b30SGuennadi Liakhovetski #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 47b5dc9b30SGuennadi Liakhovetski #define CONFIG_SETUP_MEMORY_TAGS 1 48b5dc9b30SGuennadi Liakhovetski #define CONFIG_INITRD_TAG 1 49b5dc9b30SGuennadi Liakhovetski 50b5dc9b30SGuennadi Liakhovetski /* 51b5dc9b30SGuennadi Liakhovetski * Size of malloc() pool 52b5dc9b30SGuennadi Liakhovetski */ 53b5dc9b30SGuennadi Liakhovetski #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024) 54b5dc9b30SGuennadi Liakhovetski #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ 55b5dc9b30SGuennadi Liakhovetski 56b5dc9b30SGuennadi Liakhovetski /* 57b5dc9b30SGuennadi Liakhovetski * Hardware drivers 58b5dc9b30SGuennadi Liakhovetski */ 59b5dc9b30SGuennadi Liakhovetski 60b5dc9b30SGuennadi Liakhovetski #define CONFIG_MX31_UART 1 61b5dc9b30SGuennadi Liakhovetski #define CFG_MX31_UART1 1 62b5dc9b30SGuennadi Liakhovetski 63b5dc9b30SGuennadi Liakhovetski /* allow to overwrite serial and ethaddr */ 64b5dc9b30SGuennadi Liakhovetski #define CONFIG_ENV_OVERWRITE 65b5dc9b30SGuennadi Liakhovetski #define CONFIG_CONS_INDEX 1 66b5dc9b30SGuennadi Liakhovetski #define CONFIG_BAUDRATE 115200 67b5dc9b30SGuennadi Liakhovetski #define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 68b5dc9b30SGuennadi Liakhovetski 69b5dc9b30SGuennadi Liakhovetski /*********************************************************** 70b5dc9b30SGuennadi Liakhovetski * Command definition 71b5dc9b30SGuennadi Liakhovetski ***********************************************************/ 72b5dc9b30SGuennadi Liakhovetski 73b5dc9b30SGuennadi Liakhovetski #include <config_cmd_default.h> 74b5dc9b30SGuennadi Liakhovetski 75b5dc9b30SGuennadi Liakhovetski #define CONFIG_CMD_PING 76b5dc9b30SGuennadi Liakhovetski 77b5dc9b30SGuennadi Liakhovetski #define CONFIG_BOOTDELAY 3 78b5dc9b30SGuennadi Liakhovetski 79b5dc9b30SGuennadi Liakhovetski #define CONFIG_NETMASK 255.255.255.0 80b5dc9b30SGuennadi Liakhovetski #define CONFIG_IPADDR 192.168.23.168 81b5dc9b30SGuennadi Liakhovetski #define CONFIG_SERVERIP 192.168.23.2 82b5dc9b30SGuennadi Liakhovetski 83b5dc9b30SGuennadi Liakhovetski #define CONFIG_EXTRA_ENV_SETTINGS \ 84b5dc9b30SGuennadi Liakhovetski "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ 85b5dc9b30SGuennadi Liakhovetski "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ 86b5dc9b30SGuennadi Liakhovetski "bootcmd=run bootcmd_net\0" \ 87b5dc9b30SGuennadi Liakhovetski "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \ 88b5dc9b30SGuennadi Liakhovetski "prg_uboot=tftpboot 0x80000000 u-boot-mx31ads.bin; protect off 0xa0000000 0xa001ffff; erase 0xa0000000 0xa001ffff; cp.b 0x80000000 0xa0000000 $(filesize)\0" 89b5dc9b30SGuennadi Liakhovetski 90b5dc9b30SGuennadi Liakhovetski 91b5dc9b30SGuennadi Liakhovetski #define CONFIG_DRIVER_CS8900 1 92b5dc9b30SGuennadi Liakhovetski #define CS8900_BASE 0xb4020300 93*d23ff682SGuennadi Liakhovetski #define CS8900_BUS16 1 /* follow the Linux driver */ 94*d23ff682SGuennadi Liakhovetski 95*d23ff682SGuennadi Liakhovetski /* 96*d23ff682SGuennadi Liakhovetski * The MX31ADS board seems to have a hardware "peculiarity" confirmed under 97*d23ff682SGuennadi Liakhovetski * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A 98*d23ff682SGuennadi Liakhovetski * controller inverted. The controller is capable of detecting and correcting 99*d23ff682SGuennadi Liakhovetski * this, but it needs 4 network packets for that. Which means, at startup, you 100*d23ff682SGuennadi Liakhovetski * will not receive answers to the first 4 packest, unless there have been some 101*d23ff682SGuennadi Liakhovetski * broadcasts on the network, or your board is on a hub. Reducing the ARP 102*d23ff682SGuennadi Liakhovetski * timeout from default 5 seconds to 200ms we speed up the initial TFTP 103*d23ff682SGuennadi Liakhovetski * transfer, should the user wish one, significantly. 104*d23ff682SGuennadi Liakhovetski */ 105*d23ff682SGuennadi Liakhovetski #define CONFIG_ARP_TIMEOUT 200UL 106b5dc9b30SGuennadi Liakhovetski 107b5dc9b30SGuennadi Liakhovetski /* 108b5dc9b30SGuennadi Liakhovetski * Miscellaneous configurable options 109b5dc9b30SGuennadi Liakhovetski */ 110b5dc9b30SGuennadi Liakhovetski #define CFG_LONGHELP /* undef to save memory */ 111b5dc9b30SGuennadi Liakhovetski #define CFG_PROMPT "=> " 112b5dc9b30SGuennadi Liakhovetski #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 113b5dc9b30SGuennadi Liakhovetski /* Print Buffer Size */ 114b5dc9b30SGuennadi Liakhovetski #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) 115b5dc9b30SGuennadi Liakhovetski #define CFG_MAXARGS 16 /* max number of command args */ 116b5dc9b30SGuennadi Liakhovetski #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ 117b5dc9b30SGuennadi Liakhovetski 118b5dc9b30SGuennadi Liakhovetski #define CFG_MEMTEST_START 0 /* memtest works on */ 119b5dc9b30SGuennadi Liakhovetski #define CFG_MEMTEST_END 0x10000 120b5dc9b30SGuennadi Liakhovetski 121b5dc9b30SGuennadi Liakhovetski #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ 122b5dc9b30SGuennadi Liakhovetski 123b5dc9b30SGuennadi Liakhovetski #define CFG_LOAD_ADDR CSD0_BASE /* default load address */ 124b5dc9b30SGuennadi Liakhovetski 125b5dc9b30SGuennadi Liakhovetski #define CFG_HZ 32000 126b5dc9b30SGuennadi Liakhovetski 127b5dc9b30SGuennadi Liakhovetski #define CONFIG_CMDLINE_EDITING 1 128b5dc9b30SGuennadi Liakhovetski 129b5dc9b30SGuennadi Liakhovetski /*----------------------------------------------------------------------- 130b5dc9b30SGuennadi Liakhovetski * Stack sizes 131b5dc9b30SGuennadi Liakhovetski * 132b5dc9b30SGuennadi Liakhovetski * The stack sizes are set up in start.S using the settings below 133b5dc9b30SGuennadi Liakhovetski */ 134b5dc9b30SGuennadi Liakhovetski #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 135b5dc9b30SGuennadi Liakhovetski 136b5dc9b30SGuennadi Liakhovetski /*----------------------------------------------------------------------- 137b5dc9b30SGuennadi Liakhovetski * Physical Memory Map 138b5dc9b30SGuennadi Liakhovetski */ 139b5dc9b30SGuennadi Liakhovetski #define CONFIG_NR_DRAM_BANKS 1 140b5dc9b30SGuennadi Liakhovetski #define PHYS_SDRAM_1 CSD0_BASE 141b5dc9b30SGuennadi Liakhovetski #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 142b5dc9b30SGuennadi Liakhovetski 143b5dc9b30SGuennadi Liakhovetski /*----------------------------------------------------------------------- 144b5dc9b30SGuennadi Liakhovetski * FLASH and environment organization 145b5dc9b30SGuennadi Liakhovetski */ 146b5dc9b30SGuennadi Liakhovetski #define CFG_FLASH_BASE CS0_BASE 147b5dc9b30SGuennadi Liakhovetski #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 148b5dc9b30SGuennadi Liakhovetski #define CFG_MAX_FLASH_SECT 262 /* max number of sectors on one chip */ 149b5dc9b30SGuennadi Liakhovetski #define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */ 150*d23ff682SGuennadi Liakhovetski #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */ 151b5dc9b30SGuennadi Liakhovetski 152b5dc9b30SGuennadi Liakhovetski #define CFG_ENV_IS_IN_FLASH 1 153b5dc9b30SGuennadi Liakhovetski #define CFG_ENV_SECT_SIZE (32 * 1024) 154b5dc9b30SGuennadi Liakhovetski #define CFG_ENV_SIZE CFG_ENV_SECT_SIZE 155*d23ff682SGuennadi Liakhovetski 156*d23ff682SGuennadi Liakhovetski /* Address and size of Redundant Environment Sector */ 157*d23ff682SGuennadi Liakhovetski #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE) 158*d23ff682SGuennadi Liakhovetski #define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE 159*d23ff682SGuennadi Liakhovetski 160b5dc9b30SGuennadi Liakhovetski /* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end. 161b5dc9b30SGuennadi Liakhovetski * The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors, 162b5dc9b30SGuennadi Liakhovetski * if we put environment next to it, we will have to occupy 128KiB for it. 163b5dc9b30SGuennadi Liakhovetski * Putting it at the top of flash we use only 32KiB. */ 164*d23ff682SGuennadi Liakhovetski #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_ENV_SECT_SIZE) 165b5dc9b30SGuennadi Liakhovetski 166b5dc9b30SGuennadi Liakhovetski /*----------------------------------------------------------------------- 167b5dc9b30SGuennadi Liakhovetski * CFI FLASH driver setup 168b5dc9b30SGuennadi Liakhovetski */ 169b5dc9b30SGuennadi Liakhovetski #define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */ 170b5dc9b30SGuennadi Liakhovetski #define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ 171*d23ff682SGuennadi Liakhovetski #define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */ 172b5dc9b30SGuennadi Liakhovetski #define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ 173b5dc9b30SGuennadi Liakhovetski #define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */ 174b5dc9b30SGuennadi Liakhovetski 175b5dc9b30SGuennadi Liakhovetski /* 176b5dc9b30SGuennadi Liakhovetski * JFFS2 partitions 177b5dc9b30SGuennadi Liakhovetski */ 178b5dc9b30SGuennadi Liakhovetski #undef CONFIG_JFFS2_CMDLINE 179b5dc9b30SGuennadi Liakhovetski #define CONFIG_JFFS2_DEV "nor0" 180b5dc9b30SGuennadi Liakhovetski 181b5dc9b30SGuennadi Liakhovetski #endif /* __CONFIG_H */ 182