xref: /rk3399_rockchip-uboot/include/configs/mx28evk.h (revision 40f1daa0b797e9db7413cf477637ba8d31cbb2d7)
1 /*
2  * (C) Copyright 2011 Freescale Semiconductor, Inc.
3  * Author: Fabio Estevam <fabio.estevam@freescale.com>
4  *
5  * Based on m28evk.h:
6  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
7  * on behalf of DENX Software Engineering GmbH
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
17  * GNU General Public License for more details.
18  */
19 #ifndef __MX28EVK_CONFIG_H__
20 #define __MX28EVK_CONFIG_H__
21 
22 /* SoC configurations */
23 #define CONFIG_MX28				/* i.MX28 SoC */
24 
25 #define CONFIG_MXS_GPIO			/* GPIO control */
26 #define CONFIG_SYS_HZ		1000		/* Ticks per second */
27 
28 #define CONFIG_MACH_TYPE	MACH_TYPE_MX28EVK
29 
30 #include <asm/arch/regs-base.h>
31 
32 #define CONFIG_SYS_NO_FLASH
33 #define CONFIG_BOARD_EARLY_INIT_F
34 #define CONFIG_ARCH_MISC_INIT
35 
36 /* SPL */
37 #define CONFIG_SPL
38 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
39 #define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
40 #define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
41 #define CONFIG_SPL_LIBCOMMON_SUPPORT
42 #define CONFIG_SPL_LIBGENERIC_SUPPORT
43 #define CONFIG_SPL_GPIO_SUPPORT
44 
45 /* U-Boot Commands */
46 #include <config_cmd_default.h>
47 #define CONFIG_DISPLAY_CPUINFO
48 #define CONFIG_DOS_PARTITION
49 
50 #define CONFIG_CMD_CACHE
51 #define CONFIG_CMD_DATE
52 #define CONFIG_CMD_DHCP
53 #define CONFIG_CMD_FAT
54 #define CONFIG_CMD_GPIO
55 #define CONFIG_CMD_MII
56 #define CONFIG_CMD_MMC
57 #define CONFIG_CMD_NET
58 #define CONFIG_CMD_NFS
59 #define CONFIG_CMD_PING
60 #define CONFIG_CMD_SETEXPR
61 #define CONFIG_CMD_SF
62 #define CONFIG_CMD_SPI
63 #define CONFIG_CMD_USB
64 #define CONFIG_CMD_BOOTZ
65 #define CONFIG_CMD_I2C
66 
67 /* Memory configurations */
68 #define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
69 #define PHYS_SDRAM_1			0x40000000	/* Base address */
70 #define PHYS_SDRAM_1_SIZE		0x40000000	/* Max 1 GB RAM */
71 #define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
72 #define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
73 #define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
74 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
75 /* Point initial SP in SRAM so SPL can use it too. */
76 
77 #define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
78 #define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
79 
80 #define CONFIG_SYS_INIT_SP_OFFSET \
81 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
82 #define CONFIG_SYS_INIT_SP_ADDR \
83 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
84 
85 /*
86  * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
87  * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
88  * binary. In case there was more of this mess, 0x100 bytes are skipped.
89  */
90 #define CONFIG_SYS_TEXT_BASE	0x40000100
91 
92 #define CONFIG_ENV_OVERWRITE
93 /* U-Boot general configurations */
94 #define CONFIG_SYS_LONGHELP
95 #define CONFIG_SYS_PROMPT	"MX28EVK U-Boot > "
96 #define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
97 #define CONFIG_SYS_PBSIZE	\
98 	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
99 						/* Print buffer size */
100 #define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
101 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
102 						/* Boot argument buffer size */
103 #define CONFIG_VERSION_VARIABLE	/* U-BOOT version */
104 #define CONFIG_AUTO_COMPLETE		/* Command auto complete */
105 #define CONFIG_CMDLINE_EDITING		/* Command history etc */
106 #define CONFIG_SYS_HUSH_PARSER
107 
108 /* Serial Driver */
109 #define CONFIG_PL011_SERIAL
110 #define CONFIG_PL011_CLOCK		24000000
111 #define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
112 #define CONFIG_CONS_INDEX		0
113 #define CONFIG_BAUDRATE			115200	/* Default baud rate */
114 
115 /* DMA */
116 #define CONFIG_APBH_DMA
117 
118 /* MMC Driver */
119 #define CONFIG_ENV_IS_IN_MMC
120 #ifdef CONFIG_ENV_IS_IN_MMC
121  #define CONFIG_ENV_OFFSET	(256 * 1024)
122  #define CONFIG_ENV_SIZE	(16 * 1024)
123  #define CONFIG_SYS_MMC_ENV_DEV 0
124 #endif
125 #define CONFIG_CMD_SAVEENV
126 #ifdef	CONFIG_CMD_MMC
127 #define CONFIG_MMC
128 #define CONFIG_GENERIC_MMC
129 #define CONFIG_BOUNCE_BUFFER
130 #define CONFIG_MXS_MMC
131 #endif
132 
133 /* NAND Driver */
134 #ifdef CONFIG_CMD_NAND
135 #define CONFIG_NAND_MXS
136 #define CONFIG_SYS_MAX_NAND_DEVICE	1
137 #define CONFIG_SYS_NAND_BASE		0x60000000
138 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
139 #endif
140 
141 /* Ethernet on SOC (FEC) */
142 #ifdef	CONFIG_CMD_NET
143 #define CONFIG_NET_MULTI
144 #define CONFIG_ETHPRIME	"FEC0"
145 #define CONFIG_FEC_MXC
146 #define CONFIG_MII
147 #define CONFIG_FEC_XCV_TYPE	RMII
148 #define CONFIG_MX28_FEC_MAC_IN_OCOTP
149 #endif
150 
151 /* RTC */
152 #ifdef	CONFIG_CMD_DATE
153 #define	CONFIG_RTC_MXS
154 #endif
155 
156 /* USB */
157 #ifdef	CONFIG_CMD_USB
158 #define	CONFIG_USB_EHCI
159 #define	CONFIG_USB_EHCI_MXS
160 #define CONFIG_EHCI_MXS_PORT1
161 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
162 #define	CONFIG_EHCI_IS_TDI
163 #define	CONFIG_USB_STORAGE
164 #define	CONFIG_USB_HOST_ETHER
165 #define	CONFIG_USB_ETHER_ASIX
166 #define	CONFIG_USB_ETHER_SMSC95XX
167 #endif
168 
169 /* I2C */
170 #ifdef CONFIG_CMD_I2C
171 #define CONFIG_I2C_MXS
172 #define CONFIG_HARD_I2C
173 #define CONFIG_SYS_I2C_SPEED	400000
174 #endif
175 
176 /* SPI */
177 #ifdef CONFIG_CMD_SPI
178 #define CONFIG_HARD_SPI
179 #define CONFIG_MXS_SPI
180 #define CONFIG_SPI_HALF_DUPLEX
181 #define CONFIG_DEFAULT_SPI_BUS		2
182 #define CONFIG_DEFAULT_SPI_MODE		SPI_MODE_0
183 
184 /* SPI Flash */
185 #ifdef CONFIG_CMD_SF
186 #define CONFIG_SPI_FLASH
187 #define CONFIG_SF_DEFAULT_BUS	2
188 #define CONFIG_SF_DEFAULT_CS	0
189 /* this may vary and depends on the installed chip */
190 #define CONFIG_SPI_FLASH_SST
191 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
192 #define CONFIG_SF_DEFAULT_SPEED		24000000
193 
194 /* (redundant) environemnt in SPI flash */
195 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
196 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
197 #define CONFIG_ENV_SIZE			0x1000		/* 4KB */
198 #define CONFIG_ENV_OFFSET		0x40000		/* 256K */
199 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
200 #define CONFIG_ENV_SECT_SIZE		0x1000
201 #define CONFIG_ENV_SPI_CS		0
202 #define CONFIG_ENV_SPI_BUS		2
203 #define CONFIG_ENV_SPI_MAX_HZ		24000000
204 #define CONFIG_ENV_SPI_MODE		SPI_MODE_0
205 #endif
206 #endif
207 #endif
208 
209 /* Boot Linux */
210 #define CONFIG_CMDLINE_TAG
211 #define CONFIG_SETUP_MEMORY_TAGS
212 #define CONFIG_BOOTDELAY	1
213 #define CONFIG_BOOTFILE	"uImage"
214 #define CONFIG_LOADADDR	0x42000000
215 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
216 #define CONFIG_OF_LIBFDT
217 
218 /* Extra Environments */
219 #define CONFIG_EXTRA_ENV_SETTINGS \
220 	"update_nand_full_filename=u-boot.nand\0" \
221 	"update_nand_firmware_filename=u-boot.sb\0"	\
222 	"update_sd_firmware_filename=u-boot.sd\0" \
223 	"update_nand_firmware_maxsz=0x100000\0"	\
224 	"update_nand_stride=0x40\0"	/* MX28 datasheet ch. 12.12 */ \
225 	"update_nand_count=0x4\0"	/* MX28 datasheet ch. 12.12 */ \
226 	"update_nand_get_fcb_size="	/* Get size of FCB blocks */ \
227 		"nand device 0 ; " \
228 		"nand info ; " \
229 		"setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
230 		"setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
231 	"update_nand_full="		    /* Update FCB, DBBT and FW */ \
232 		"if tftp ${update_nand_full_filename} ; then " \
233 		"run update_nand_get_fcb_size ; " \
234 		"nand scrub -y 0x0 ${filesize} ; " \
235 		"nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
236 		"setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
237 		"setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
238 		"nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
239 		"fi\0" \
240 	"update_nand_firmware="		/* Update only firmware */ \
241 		"if tftp ${update_nand_firmware_filename} ; then " \
242 		"run update_nand_get_fcb_size ; " \
243 		"setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
244 		"setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
245 		"setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
246 		"nand erase ${fcb_sz} ${fw_sz} ; " \
247 		"nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
248 		"nand write ${loadaddr} ${fw_off} ${filesize} ; " \
249 		"fi\0" \
250 	"update_sd_firmware="		/* Update the SD firmware partition */ \
251 		"if mmc rescan ; then "	\
252 		"if tftp ${update_sd_firmware_filename} ; then " \
253 		"setexpr fw_sz ${filesize} / 0x200 ; "	/* SD block size */ \
254 		"setexpr fw_sz ${fw_sz} + 1 ; "	\
255 		"mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
256 		"fi ; "	\
257 		"fi\0" \
258 	"script=boot.scr\0"	\
259 	"uimage=uImage\0" \
260 	"console_fsl=ttyAM0\0" \
261 	"console_mainline=ttyAMA0\0" \
262 	"fdt_file=imx28-evk.dtb\0" \
263 	"fdt_addr=0x41000000\0" \
264 	"boot_fdt=try\0" \
265 	"ip_dyn=yes\0" \
266 	"mmcdev=0\0" \
267 	"mmcpart=2\0" \
268 	"mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
269 	"mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
270 		"root=${mmcroot}\0" \
271 	"loadbootscript="  \
272 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
273 	"bootscript=echo Running bootscript from mmc ...; "	\
274 		"source\0" \
275 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
276 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
277 	"mmcboot=echo Booting from mmc ...; " \
278 		"run mmcargs; " \
279 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
280 			"if run loadfdt; then " \
281 				"bootm ${loadaddr} - ${fdt_addr}; " \
282 			"else " \
283 				"if test ${boot_fdt} = try; then " \
284 					"bootm; " \
285 				"else " \
286 					"echo WARN: Cannot load the DT; " \
287 				"fi; " \
288 			"fi; " \
289 		"else " \
290 			"bootm; " \
291 		"fi;\0" \
292 	"netargs=setenv bootargs console=${console_mainline},${baudrate} " \
293 		"root=/dev/nfs " \
294 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
295 	"netboot=echo Booting from net ...; " \
296 		"run netargs; "	\
297 		"if test ${ip_dyn} = yes; then " \
298 			"setenv get_cmd dhcp; " \
299 		"else " \
300 			"setenv get_cmd tftp; " \
301 		"fi; " \
302 		"${get_cmd} ${uimage}; " \
303 		"if test ${boot_fdt} = yes; then " \
304 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
305 				"bootm ${loadaddr} - ${fdt_addr}; " \
306 			"else " \
307 				"if test ${boot_fdt} = try; then " \
308 					"bootm; " \
309 				"else " \
310 					"echo WARN: Cannot load the DT; " \
311 				"fi;" \
312 			"fi; " \
313 		"else " \
314 			"bootm; " \
315 		"fi;\0"
316 
317 #define CONFIG_BOOTCOMMAND \
318 	"mmc dev ${mmcdev}; if mmc rescan; then " \
319 		"if run loadbootscript; then " \
320 			"run bootscript; " \
321 		"else " \
322 			"if run loaduimage; then " \
323 				"run mmcboot; " \
324 			"else run netboot; " \
325 			"fi; " \
326 		"fi; " \
327 	"else run netboot; fi"
328 
329 #endif /* __MX28EVK_CONFIG_H__ */
330