129f75a5cSFabio Estevam /* 229f75a5cSFabio Estevam * (C) Copyright 2011 Freescale Semiconductor, Inc. 329f75a5cSFabio Estevam * Author: Fabio Estevam <fabio.estevam@freescale.com> 429f75a5cSFabio Estevam * 529f75a5cSFabio Estevam * Based on m28evk.h: 629f75a5cSFabio Estevam * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 729f75a5cSFabio Estevam * on behalf of DENX Software Engineering GmbH 829f75a5cSFabio Estevam * 9*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 1029f75a5cSFabio Estevam */ 11606de8b6SOtavio Salvador #ifndef __MX28EVK_CONFIG_H__ 12606de8b6SOtavio Salvador #define __MX28EVK_CONFIG_H__ 1329f75a5cSFabio Estevam 1440f1daa0SFabio Estevam /* SoC configurations */ 1529f75a5cSFabio Estevam #define CONFIG_MX28 /* i.MX28 SoC */ 16e229d445SOtavio Salvador 1729f75a5cSFabio Estevam #define CONFIG_MXS_GPIO /* GPIO control */ 1829f75a5cSFabio Estevam #define CONFIG_SYS_HZ 1000 /* Ticks per second */ 1929f75a5cSFabio Estevam 2029f75a5cSFabio Estevam #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK 2129f75a5cSFabio Estevam 22e229d445SOtavio Salvador #include <asm/arch/regs-base.h> 23e229d445SOtavio Salvador 2429f75a5cSFabio Estevam #define CONFIG_SYS_NO_FLASH 2529f75a5cSFabio Estevam #define CONFIG_BOARD_EARLY_INIT_F 2629f75a5cSFabio Estevam #define CONFIG_ARCH_MISC_INIT 2729f75a5cSFabio Estevam 2840f1daa0SFabio Estevam /* SPL */ 2929f75a5cSFabio Estevam #define CONFIG_SPL 3029f75a5cSFabio Estevam #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 313a0398d7SOtavio Salvador #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 323a0398d7SOtavio Salvador #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" 3329f75a5cSFabio Estevam #define CONFIG_SPL_LIBCOMMON_SUPPORT 3429f75a5cSFabio Estevam #define CONFIG_SPL_LIBGENERIC_SUPPORT 35f8c4a86bSMarek Vasut #define CONFIG_SPL_GPIO_SUPPORT 3629f75a5cSFabio Estevam 3740f1daa0SFabio Estevam /* U-Boot Commands */ 3829f75a5cSFabio Estevam #include <config_cmd_default.h> 3929f75a5cSFabio Estevam #define CONFIG_DISPLAY_CPUINFO 4029f75a5cSFabio Estevam #define CONFIG_DOS_PARTITION 4129f75a5cSFabio Estevam 4229f75a5cSFabio Estevam #define CONFIG_CMD_CACHE 439588d942SMatthias Fuchs #define CONFIG_CMD_DATE 4429f75a5cSFabio Estevam #define CONFIG_CMD_DHCP 453b4efee9SOtavio Salvador #define CONFIG_CMD_FAT 4629f75a5cSFabio Estevam #define CONFIG_CMD_GPIO 4729f75a5cSFabio Estevam #define CONFIG_CMD_MII 4829f75a5cSFabio Estevam #define CONFIG_CMD_MMC 4929f75a5cSFabio Estevam #define CONFIG_CMD_NET 5029f75a5cSFabio Estevam #define CONFIG_CMD_NFS 5129f75a5cSFabio Estevam #define CONFIG_CMD_PING 527577a4b3SOtavio Salvador #define CONFIG_CMD_SETEXPR 53ed97abedSMatthias Fuchs #define CONFIG_CMD_SF 54ed97abedSMatthias Fuchs #define CONFIG_CMD_SPI 55598aa2bbSMatthias Fuchs #define CONFIG_CMD_USB 5634990e12SFabio Estevam #define CONFIG_CMD_BOOTZ 57ab461be6SFabio Estevam #define CONFIG_CMD_NAND 588b360c06SEric Benard #define CONFIG_CMD_NAND_TRIMFFS 5968661db2SFabio Estevam #define CONFIG_VIDEO 6029f75a5cSFabio Estevam 6140f1daa0SFabio Estevam /* Memory configurations */ 6229f75a5cSFabio Estevam #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 6329f75a5cSFabio Estevam #define PHYS_SDRAM_1 0x40000000 /* Base address */ 6429f75a5cSFabio Estevam #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ 6529f75a5cSFabio Estevam #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 6629f75a5cSFabio Estevam #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 6729f75a5cSFabio Estevam #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 6829f75a5cSFabio Estevam #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 6929f75a5cSFabio Estevam /* Point initial SP in SRAM so SPL can use it too. */ 7029f75a5cSFabio Estevam 719ed5dfa8SMarek Vasut #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 7229f75a5cSFabio Estevam #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 7329f75a5cSFabio Estevam 7429f75a5cSFabio Estevam #define CONFIG_SYS_INIT_SP_OFFSET \ 7529f75a5cSFabio Estevam (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 7629f75a5cSFabio Estevam #define CONFIG_SYS_INIT_SP_ADDR \ 7729f75a5cSFabio Estevam (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 7829f75a5cSFabio Estevam 7929f75a5cSFabio Estevam /* 8029f75a5cSFabio Estevam * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 8129f75a5cSFabio Estevam * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 8229f75a5cSFabio Estevam * binary. In case there was more of this mess, 0x100 bytes are skipped. 8329f75a5cSFabio Estevam */ 8429f75a5cSFabio Estevam #define CONFIG_SYS_TEXT_BASE 0x40000100 8529f75a5cSFabio Estevam 8629f75a5cSFabio Estevam #define CONFIG_ENV_OVERWRITE 8740f1daa0SFabio Estevam /* U-Boot general configurations */ 8829f75a5cSFabio Estevam #define CONFIG_SYS_LONGHELP 8929f75a5cSFabio Estevam #define CONFIG_SYS_PROMPT "MX28EVK U-Boot > " 9029f75a5cSFabio Estevam #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 9129f75a5cSFabio Estevam #define CONFIG_SYS_PBSIZE \ 9229f75a5cSFabio Estevam (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 9329f75a5cSFabio Estevam /* Print buffer size */ 9429f75a5cSFabio Estevam #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 9529f75a5cSFabio Estevam #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 9629f75a5cSFabio Estevam /* Boot argument buffer size */ 9729f75a5cSFabio Estevam #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 9829f75a5cSFabio Estevam #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 9929f75a5cSFabio Estevam #define CONFIG_CMDLINE_EDITING /* Command history etc */ 10029f75a5cSFabio Estevam #define CONFIG_SYS_HUSH_PARSER 10129f75a5cSFabio Estevam 10240f1daa0SFabio Estevam /* Serial Driver */ 10329f75a5cSFabio Estevam #define CONFIG_PL011_SERIAL 10429f75a5cSFabio Estevam #define CONFIG_PL011_CLOCK 24000000 10529f75a5cSFabio Estevam #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 10629f75a5cSFabio Estevam #define CONFIG_CONS_INDEX 0 10729f75a5cSFabio Estevam #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 10829f75a5cSFabio Estevam 10940f1daa0SFabio Estevam /* DMA */ 1101102d8d7SAnatolij Gustschin #define CONFIG_APBH_DMA 1111102d8d7SAnatolij Gustschin 11240f1daa0SFabio Estevam /* MMC Driver */ 113ed97abedSMatthias Fuchs #ifdef CONFIG_ENV_IS_IN_MMC 11429f75a5cSFabio Estevam #define CONFIG_ENV_OFFSET (256 * 1024) 11529f75a5cSFabio Estevam #define CONFIG_ENV_SIZE (16 * 1024) 11629f75a5cSFabio Estevam #define CONFIG_SYS_MMC_ENV_DEV 0 117ed97abedSMatthias Fuchs #endif 11829f75a5cSFabio Estevam #define CONFIG_CMD_SAVEENV 11929f75a5cSFabio Estevam #ifdef CONFIG_CMD_MMC 12029f75a5cSFabio Estevam #define CONFIG_MMC 12129f75a5cSFabio Estevam #define CONFIG_GENERIC_MMC 1226dc71c8dSMarek Vasut #define CONFIG_BOUNCE_BUFFER 12329f75a5cSFabio Estevam #define CONFIG_MXS_MMC 12429f75a5cSFabio Estevam #endif 12529f75a5cSFabio Estevam 12640f1daa0SFabio Estevam /* NAND Driver */ 127ab461be6SFabio Estevam #define CONFIG_ENV_SIZE (16 * 1024) 128ecb7be29SLauri Hintsala #ifdef CONFIG_CMD_NAND 129ecb7be29SLauri Hintsala #define CONFIG_NAND_MXS 130ecb7be29SLauri Hintsala #define CONFIG_SYS_MAX_NAND_DEVICE 1 131ecb7be29SLauri Hintsala #define CONFIG_SYS_NAND_BASE 0x60000000 132ecb7be29SLauri Hintsala #define CONFIG_SYS_NAND_5_ADDR_CYCLE 133ab461be6SFabio Estevam 134ab461be6SFabio Estevam /* Environment is in NAND */ 135da85c9c8STom Rini #ifdef CONFIG_ENV_IS_IN_NAND 136ab461be6SFabio Estevam #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 137ab461be6SFabio Estevam #define CONFIG_ENV_SECT_SIZE (128 * 1024) 138ab461be6SFabio Estevam #define CONFIG_ENV_RANGE (512 * 1024) 139ab461be6SFabio Estevam #define CONFIG_ENV_OFFSET 0x300000 140ab461be6SFabio Estevam #define CONFIG_ENV_OFFSET_REDUND \ 141ab461be6SFabio Estevam (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 142da85c9c8STom Rini #endif 143ab461be6SFabio Estevam 144ab461be6SFabio Estevam #define CONFIG_CMD_UBI 145ab461be6SFabio Estevam #define CONFIG_CMD_UBIFS 146ab461be6SFabio Estevam #define CONFIG_CMD_MTDPARTS 147ab461be6SFabio Estevam #define CONFIG_RBTREE 148ab461be6SFabio Estevam #define CONFIG_LZO 149ab461be6SFabio Estevam #define CONFIG_MTD_DEVICE 150ab461be6SFabio Estevam #define CONFIG_MTD_PARTITIONS 151ab461be6SFabio Estevam #define MTDIDS_DEFAULT "nand0=gpmi-nand" 152ab461be6SFabio Estevam #define MTDPARTS_DEFAULT \ 153ab461be6SFabio Estevam "mtdparts=gpmi-nand:" \ 154ab461be6SFabio Estevam "3m(bootloader)ro," \ 155ab461be6SFabio Estevam "512k(environment)," \ 156ab461be6SFabio Estevam "512k(redundant-environment)," \ 157ab461be6SFabio Estevam "4m(kernel)," \ 158ab461be6SFabio Estevam "128k(fdt)," \ 159ab461be6SFabio Estevam "8m(ramdisk)," \ 160ab461be6SFabio Estevam "-(filesystem)" 161ecb7be29SLauri Hintsala #endif 162ecb7be29SLauri Hintsala 16340f1daa0SFabio Estevam /* Ethernet on SOC (FEC) */ 16429f75a5cSFabio Estevam #ifdef CONFIG_CMD_NET 16529f75a5cSFabio Estevam #define CONFIG_NET_MULTI 16629f75a5cSFabio Estevam #define CONFIG_ETHPRIME "FEC0" 16729f75a5cSFabio Estevam #define CONFIG_FEC_MXC 16829f75a5cSFabio Estevam #define CONFIG_MII 16929f75a5cSFabio Estevam #define CONFIG_FEC_XCV_TYPE RMII 17029f75a5cSFabio Estevam #define CONFIG_MX28_FEC_MAC_IN_OCOTP 17129f75a5cSFabio Estevam #endif 17229f75a5cSFabio Estevam 17340f1daa0SFabio Estevam /* RTC */ 1749588d942SMatthias Fuchs #ifdef CONFIG_CMD_DATE 1759588d942SMatthias Fuchs #define CONFIG_RTC_MXS 1769588d942SMatthias Fuchs #endif 1779588d942SMatthias Fuchs 17840f1daa0SFabio Estevam /* USB */ 179598aa2bbSMatthias Fuchs #ifdef CONFIG_CMD_USB 180598aa2bbSMatthias Fuchs #define CONFIG_USB_EHCI 181598aa2bbSMatthias Fuchs #define CONFIG_USB_EHCI_MXS 182598aa2bbSMatthias Fuchs #define CONFIG_EHCI_MXS_PORT1 183afa87210SMarek Vasut #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 184598aa2bbSMatthias Fuchs #define CONFIG_EHCI_IS_TDI 185598aa2bbSMatthias Fuchs #define CONFIG_USB_STORAGE 18691dd7ca6SFabio Estevam #define CONFIG_USB_HOST_ETHER 18791dd7ca6SFabio Estevam #define CONFIG_USB_ETHER_ASIX 18891dd7ca6SFabio Estevam #define CONFIG_USB_ETHER_SMSC95XX 189598aa2bbSMatthias Fuchs #endif 190598aa2bbSMatthias Fuchs 191175a7d27SFabio Estevam /* I2C */ 192175a7d27SFabio Estevam #ifdef CONFIG_CMD_I2C 193175a7d27SFabio Estevam #define CONFIG_I2C_MXS 194175a7d27SFabio Estevam #define CONFIG_HARD_I2C 195175a7d27SFabio Estevam #define CONFIG_SYS_I2C_SPEED 400000 196175a7d27SFabio Estevam #endif 197175a7d27SFabio Estevam 19840f1daa0SFabio Estevam /* SPI */ 199ed97abedSMatthias Fuchs #ifdef CONFIG_CMD_SPI 200ed97abedSMatthias Fuchs #define CONFIG_HARD_SPI 201ed97abedSMatthias Fuchs #define CONFIG_MXS_SPI 202ed97abedSMatthias Fuchs #define CONFIG_SPI_HALF_DUPLEX 203ed97abedSMatthias Fuchs #define CONFIG_DEFAULT_SPI_BUS 2 204ed97abedSMatthias Fuchs #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 205ed97abedSMatthias Fuchs 206ed97abedSMatthias Fuchs /* SPI Flash */ 207ed97abedSMatthias Fuchs #ifdef CONFIG_CMD_SF 208ed97abedSMatthias Fuchs #define CONFIG_SPI_FLASH 2091fc3bbd1SFabio Estevam #define CONFIG_SF_DEFAULT_BUS 2 2101fc3bbd1SFabio Estevam #define CONFIG_SF_DEFAULT_CS 0 211ed97abedSMatthias Fuchs /* this may vary and depends on the installed chip */ 212ed97abedSMatthias Fuchs #define CONFIG_SPI_FLASH_SST 213ed97abedSMatthias Fuchs #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 214ed97abedSMatthias Fuchs #define CONFIG_SF_DEFAULT_SPEED 24000000 215ed97abedSMatthias Fuchs 216ed97abedSMatthias Fuchs /* (redundant) environemnt in SPI flash */ 217ed97abedSMatthias Fuchs #ifdef CONFIG_ENV_IS_IN_SPI_FLASH 218ed97abedSMatthias Fuchs #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 219ed97abedSMatthias Fuchs #define CONFIG_ENV_SIZE 0x1000 /* 4KB */ 220ed97abedSMatthias Fuchs #define CONFIG_ENV_OFFSET 0x40000 /* 256K */ 221ed97abedSMatthias Fuchs #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 222ed97abedSMatthias Fuchs #define CONFIG_ENV_SECT_SIZE 0x1000 223ed97abedSMatthias Fuchs #define CONFIG_ENV_SPI_CS 0 224ed97abedSMatthias Fuchs #define CONFIG_ENV_SPI_BUS 2 225ed97abedSMatthias Fuchs #define CONFIG_ENV_SPI_MAX_HZ 24000000 226ed97abedSMatthias Fuchs #define CONFIG_ENV_SPI_MODE SPI_MODE_0 227ed97abedSMatthias Fuchs #endif 228ed97abedSMatthias Fuchs #endif 229ed97abedSMatthias Fuchs #endif 230ed97abedSMatthias Fuchs 23168661db2SFabio Estevam /* Framebuffer support */ 23268661db2SFabio Estevam #ifdef CONFIG_VIDEO 23368661db2SFabio Estevam #define CONFIG_CFB_CONSOLE 23468661db2SFabio Estevam #define CONFIG_VIDEO_MXS 23568661db2SFabio Estevam #define CONFIG_VIDEO_LOGO 23668661db2SFabio Estevam #define CONFIG_VIDEO_SW_CURSOR 23768661db2SFabio Estevam #define CONFIG_VGA_AS_SINGLE_DEVICE 23868661db2SFabio Estevam #define CONFIG_SYS_CONSOLE_IS_IN_ENV 23968661db2SFabio Estevam #define CONFIG_SPLASH_SCREEN 24068661db2SFabio Estevam #define CONFIG_CMD_BMP 24168661db2SFabio Estevam #define CONFIG_BMP_16BPP 24268661db2SFabio Estevam #define CONFIG_VIDEO_BMP_RLE8 24368661db2SFabio Estevam #define CONFIG_VIDEO_BMP_GZIP 24468661db2SFabio Estevam #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) 24568661db2SFabio Estevam #endif 24668661db2SFabio Estevam 24740f1daa0SFabio Estevam /* Boot Linux */ 24829f75a5cSFabio Estevam #define CONFIG_CMDLINE_TAG 24929f75a5cSFabio Estevam #define CONFIG_SETUP_MEMORY_TAGS 25027856943SFabio Estevam #define CONFIG_BOOTDELAY 1 25129f75a5cSFabio Estevam #define CONFIG_BOOTFILE "uImage" 25229f75a5cSFabio Estevam #define CONFIG_LOADADDR 0x42000000 25329f75a5cSFabio Estevam #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 254e310016bSFabio Estevam #define CONFIG_OF_LIBFDT 25529f75a5cSFabio Estevam 25640f1daa0SFabio Estevam /* Extra Environments */ 25729f75a5cSFabio Estevam #define CONFIG_EXTRA_ENV_SETTINGS \ 258f994dc5eSOtavio Salvador "update_nand_full_filename=u-boot.nand\0" \ 259f994dc5eSOtavio Salvador "update_nand_firmware_filename=u-boot.sb\0" \ 260f994dc5eSOtavio Salvador "update_sd_firmware_filename=u-boot.sd\0" \ 261f994dc5eSOtavio Salvador "update_nand_firmware_maxsz=0x100000\0" \ 262f994dc5eSOtavio Salvador "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \ 263f994dc5eSOtavio Salvador "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \ 264f994dc5eSOtavio Salvador "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \ 265f994dc5eSOtavio Salvador "nand device 0 ; " \ 266f994dc5eSOtavio Salvador "nand info ; " \ 267f994dc5eSOtavio Salvador "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \ 268f994dc5eSOtavio Salvador "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \ 269f994dc5eSOtavio Salvador "update_nand_full=" /* Update FCB, DBBT and FW */ \ 270f994dc5eSOtavio Salvador "if tftp ${update_nand_full_filename} ; then " \ 271f994dc5eSOtavio Salvador "run update_nand_get_fcb_size ; " \ 272f994dc5eSOtavio Salvador "nand scrub -y 0x0 ${filesize} ; " \ 27371779d5bSEric Benard "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \ 274f994dc5eSOtavio Salvador "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \ 275f994dc5eSOtavio Salvador "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \ 276f994dc5eSOtavio Salvador "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \ 277f994dc5eSOtavio Salvador "fi\0" \ 278f994dc5eSOtavio Salvador "update_nand_firmware=" /* Update only firmware */ \ 279f994dc5eSOtavio Salvador "if tftp ${update_nand_firmware_filename} ; then " \ 280f994dc5eSOtavio Salvador "run update_nand_get_fcb_size ; " \ 281f994dc5eSOtavio Salvador "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \ 282f994dc5eSOtavio Salvador "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \ 283f994dc5eSOtavio Salvador "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \ 284f994dc5eSOtavio Salvador "nand erase ${fcb_sz} ${fw_sz} ; " \ 285f994dc5eSOtavio Salvador "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \ 286f994dc5eSOtavio Salvador "nand write ${loadaddr} ${fw_off} ${filesize} ; " \ 287f994dc5eSOtavio Salvador "fi\0" \ 288f994dc5eSOtavio Salvador "update_sd_firmware=" /* Update the SD firmware partition */ \ 289f994dc5eSOtavio Salvador "if mmc rescan ; then " \ 290f994dc5eSOtavio Salvador "if tftp ${update_sd_firmware_filename} ; then " \ 291f994dc5eSOtavio Salvador "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ 292f994dc5eSOtavio Salvador "setexpr fw_sz ${fw_sz} + 1 ; " \ 293f994dc5eSOtavio Salvador "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ 294f994dc5eSOtavio Salvador "fi ; " \ 295f994dc5eSOtavio Salvador "fi\0" \ 296f994dc5eSOtavio Salvador "script=boot.scr\0" \ 297f994dc5eSOtavio Salvador "uimage=uImage\0" \ 298f994dc5eSOtavio Salvador "console_fsl=ttyAM0\0" \ 299f994dc5eSOtavio Salvador "console_mainline=ttyAMA0\0" \ 3004c6b2350SOtavio Salvador "fdt_file=imx28-evk.dtb\0" \ 3014c6b2350SOtavio Salvador "fdt_addr=0x41000000\0" \ 3024c6b2350SOtavio Salvador "boot_fdt=try\0" \ 3034c6b2350SOtavio Salvador "ip_dyn=yes\0" \ 304f994dc5eSOtavio Salvador "mmcdev=0\0" \ 305f994dc5eSOtavio Salvador "mmcpart=2\0" \ 3063c41e901SOtavio Salvador "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \ 307f994dc5eSOtavio Salvador "mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \ 3083c41e901SOtavio Salvador "root=${mmcroot}\0" \ 309f994dc5eSOtavio Salvador "loadbootscript=" \ 310f994dc5eSOtavio Salvador "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 311f994dc5eSOtavio Salvador "bootscript=echo Running bootscript from mmc ...; " \ 312f994dc5eSOtavio Salvador "source\0" \ 313f994dc5eSOtavio Salvador "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 3144c6b2350SOtavio Salvador "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 315f994dc5eSOtavio Salvador "mmcboot=echo Booting from mmc ...; " \ 316f994dc5eSOtavio Salvador "run mmcargs; " \ 3174c6b2350SOtavio Salvador "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 3184c6b2350SOtavio Salvador "if run loadfdt; then " \ 3194c6b2350SOtavio Salvador "bootm ${loadaddr} - ${fdt_addr}; " \ 3204c6b2350SOtavio Salvador "else " \ 3214c6b2350SOtavio Salvador "if test ${boot_fdt} = try; then " \ 3224c6b2350SOtavio Salvador "bootm; " \ 3234c6b2350SOtavio Salvador "else " \ 3244c6b2350SOtavio Salvador "echo WARN: Cannot load the DT; " \ 3254c6b2350SOtavio Salvador "fi; " \ 3264c6b2350SOtavio Salvador "fi; " \ 3274c6b2350SOtavio Salvador "else " \ 3284c6b2350SOtavio Salvador "bootm; " \ 3294c6b2350SOtavio Salvador "fi;\0" \ 330f994dc5eSOtavio Salvador "netargs=setenv bootargs console=${console_mainline},${baudrate} " \ 33129f75a5cSFabio Estevam "root=/dev/nfs " \ 332f994dc5eSOtavio Salvador "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 333f994dc5eSOtavio Salvador "netboot=echo Booting from net ...; " \ 33429f75a5cSFabio Estevam "run netargs; " \ 3354c6b2350SOtavio Salvador "if test ${ip_dyn} = yes; then " \ 3364c6b2350SOtavio Salvador "setenv get_cmd dhcp; " \ 3374c6b2350SOtavio Salvador "else " \ 3384c6b2350SOtavio Salvador "setenv get_cmd tftp; " \ 3394c6b2350SOtavio Salvador "fi; " \ 3404c6b2350SOtavio Salvador "${get_cmd} ${uimage}; " \ 3414c6b2350SOtavio Salvador "if test ${boot_fdt} = yes; then " \ 3424c6b2350SOtavio Salvador "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 3434c6b2350SOtavio Salvador "bootm ${loadaddr} - ${fdt_addr}; " \ 3444c6b2350SOtavio Salvador "else " \ 3454c6b2350SOtavio Salvador "if test ${boot_fdt} = try; then " \ 3464c6b2350SOtavio Salvador "bootm; " \ 3474c6b2350SOtavio Salvador "else " \ 3484c6b2350SOtavio Salvador "echo WARN: Cannot load the DT; " \ 3494c6b2350SOtavio Salvador "fi;" \ 3504c6b2350SOtavio Salvador "fi; " \ 3514c6b2350SOtavio Salvador "else " \ 3524c6b2350SOtavio Salvador "bootm; " \ 3534c6b2350SOtavio Salvador "fi;\0" 354f994dc5eSOtavio Salvador 355f994dc5eSOtavio Salvador #define CONFIG_BOOTCOMMAND \ 35666968110SAndrew Bradford "mmc dev ${mmcdev}; if mmc rescan; then " \ 357f994dc5eSOtavio Salvador "if run loadbootscript; then " \ 358f994dc5eSOtavio Salvador "run bootscript; " \ 359f994dc5eSOtavio Salvador "else " \ 360f994dc5eSOtavio Salvador "if run loaduimage; then " \ 361f994dc5eSOtavio Salvador "run mmcboot; " \ 362f994dc5eSOtavio Salvador "else run netboot; " \ 363f994dc5eSOtavio Salvador "fi; " \ 364f994dc5eSOtavio Salvador "fi; " \ 365f994dc5eSOtavio Salvador "else run netboot; fi" 36629f75a5cSFabio Estevam 367606de8b6SOtavio Salvador #endif /* __MX28EVK_CONFIG_H__ */ 368