xref: /rk3399_rockchip-uboot/include/configs/mx25pdk.h (revision e100a3d52ebfb4604cca04710a31dfbc91225e96)
1 /*
2  * (C) Copyright 2011 Freescale Semiconductor, Inc.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of
7  * the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
12  * GNU General Public License for more details.
13  */
14 
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17 
18 #include <asm/arch/imx-regs.h>
19 
20 /* High Level Configuration Options */
21 
22 #define CONFIG_MX25
23 #define CONFIG_SYS_HZ			1000
24 #define CONFIG_SYS_TEXT_BASE		0x81200000
25 #define CONFIG_MXC_GPIO
26 
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
29 
30 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 
34 #define CONFIG_MACH_TYPE	MACH_TYPE_MX25_3DS
35 
36 /* Size of malloc() pool */
37 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
38 
39 /* Physical Memory Map */
40 
41 #define CONFIG_NR_DRAM_BANKS	1
42 #define PHYS_SDRAM_1		0x80000000
43 #define PHYS_SDRAM_1_SIZE	(64 * 1024 * 1024)
44 
45 #define CONFIG_BOARD_EARLY_INIT_F
46 
47 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
48 #define CONFIG_SYS_INIT_RAM_ADDR	IMX_RAM_BASE
49 #define CONFIG_SYS_INIT_RAM_SIZE	IMX_RAM_SIZE
50 
51 #define CONFIG_SYS_INIT_SP_OFFSET \
52 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
53 #define CONFIG_SYS_INIT_SP_ADDR \
54 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
55 
56 /* Memory Test */
57 #define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2)
58 #define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
59 
60 /* Serial Info */
61 #define CONFIG_MXC_UART
62 #define CONFIG_MXC_UART_BASE	UART1_BASE
63 #define CONFIG_CONS_INDEX	1	/* use UART0 for console */
64 #define CONFIG_BAUDRATE		115200	/* Default baud rate */
65 
66 /* No NOR flash present */
67 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
68 #define CONFIG_ENV_SIZE        (8 * 1024)
69 
70 #define CONFIG_SYS_NO_FLASH
71 #define CONFIG_ENV_IS_IN_MMC
72 #define CONFIG_SYS_MMC_ENV_DEV 0
73 
74 /* U-Boot general configuration */
75 #define CONFIG_SYS_PROMPT	"MX25PDK U-Boot > "
76 #define CONFIG_AUTO_COMPLETE
77 #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size  */
78 /* Print buffer sz */
79 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
80 		sizeof(CONFIG_SYS_PROMPT) + 16)
81 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
82 /* Boot Argument Buffer Size */
83 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
84 #define CONFIG_CMDLINE_EDITING
85 #define CONFIG_SYS_LONGHELP
86 
87 /* U-Boot commands */
88 #include <config_cmd_default.h>
89 #define CONFIG_CMD_CACHE
90 #define CONFIG_CMD_MMC
91 #define CONFIG_CMD_EXT2
92 #define CONFIG_CMD_FAT
93 
94 /* Ethernet */
95 #define CONFIG_FEC_MXC
96 #define CONFIG_FEC_MXC_PHYADDR		0x1f
97 #define CONFIG_MII
98 #define CONFIG_CMD_NET
99 #define CONFIG_ENV_OVERWRITE
100 
101 /* ESDHC driver */
102 #define CONFIG_MMC
103 #define CONFIG_GENERIC_MMC
104 #define CONFIG_FSL_ESDHC
105 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
106 #define CONFIG_SYS_FSL_ESDHC_NUM	1
107 
108 #define CONFIG_DOS_PARTITION
109 
110 #define CONFIG_BOOTDELAY	3
111 
112 #define CONFIG_LOADADDR		0x81000000	/* loadaddr env var */
113 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
114 
115 #define CONFIG_EXTRA_ENV_SETTINGS \
116 	"script=boot.scr\0" \
117 	"uimage=uImage\0" \
118 	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
119 		"root=/dev/nfs " \
120 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
121 	"bootcmd=run netargs; dhcp ${uimage}; bootm\0" \
122 
123 #endif /* __CONFIG_H */
124