1*633fa0e7SStefan Roese /* 2*633fa0e7SStefan Roese * Copyright (C) 2016 Stefan Roese <sr@denx.de> 3*633fa0e7SStefan Roese * 4*633fa0e7SStefan Roese * SPDX-License-Identifier: GPL-2.0+ 5*633fa0e7SStefan Roese */ 6*633fa0e7SStefan Roese 7*633fa0e7SStefan Roese #ifndef _CONFIG_MVEBU_ARMADA_8K_H 8*633fa0e7SStefan Roese #define _CONFIG_MVEBU_ARMADA_8K_H 9*633fa0e7SStefan Roese 10*633fa0e7SStefan Roese /* 11*633fa0e7SStefan Roese * High Level Configuration Options (easy to change) 12*633fa0e7SStefan Roese */ 13*633fa0e7SStefan Roese #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 14*633fa0e7SStefan Roese 15*633fa0e7SStefan Roese #define CONFIG_DISPLAY_BOARDINFO_LATE 16*633fa0e7SStefan Roese #define CONFIG_ARCH_EARLY_INIT_R 17*633fa0e7SStefan Roese #define CONFIG_BOARD_LATE_INIT 18*633fa0e7SStefan Roese 19*633fa0e7SStefan Roese #define CONFIG_SYS_TEXT_BASE 0x00000000 20*633fa0e7SStefan Roese 21*633fa0e7SStefan Roese /* additions for new ARM relocation support */ 22*633fa0e7SStefan Roese #define CONFIG_SYS_SDRAM_BASE 0x00000000 23*633fa0e7SStefan Roese 24*633fa0e7SStefan Roese #define CONFIG_NR_DRAM_BANKS 1 25*633fa0e7SStefan Roese 26*633fa0e7SStefan Roese /* auto boot */ 27*633fa0e7SStefan Roese #define CONFIG_PREBOOT 28*633fa0e7SStefan Roese 29*633fa0e7SStefan Roese #define CONFIG_BAUDRATE 115200 30*633fa0e7SStefan Roese #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 31*633fa0e7SStefan Roese 115200, 230400, 460800, 921600 } 32*633fa0e7SStefan Roese 33*633fa0e7SStefan Roese /* 34*633fa0e7SStefan Roese * For booting Linux, the board info and command line data 35*633fa0e7SStefan Roese * have to be in the first 8 MB of memory, since this is 36*633fa0e7SStefan Roese * the maximum mapped by the Linux kernel during initialization. 37*633fa0e7SStefan Roese */ 38*633fa0e7SStefan Roese #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 39*633fa0e7SStefan Roese #define CONFIG_INITRD_TAG /* enable INITRD tag */ 40*633fa0e7SStefan Roese #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 41*633fa0e7SStefan Roese 42*633fa0e7SStefan Roese #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ 43*633fa0e7SStefan Roese #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 44*633fa0e7SStefan Roese +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ 45*633fa0e7SStefan Roese 46*633fa0e7SStefan Roese /* 47*633fa0e7SStefan Roese * Size of malloc() pool 48*633fa0e7SStefan Roese */ 49*633fa0e7SStefan Roese #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */ 50*633fa0e7SStefan Roese 51*633fa0e7SStefan Roese /* 52*633fa0e7SStefan Roese * Other required minimal configurations 53*633fa0e7SStefan Roese */ 54*633fa0e7SStefan Roese #define CONFIG_SYS_LONGHELP 55*633fa0e7SStefan Roese #define CONFIG_AUTO_COMPLETE 56*633fa0e7SStefan Roese #define CONFIG_CMDLINE_EDITING 57*633fa0e7SStefan Roese #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 58*633fa0e7SStefan Roese #define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */ 59*633fa0e7SStefan Roese #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 60*633fa0e7SStefan Roese #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ 61*633fa0e7SStefan Roese #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ 62*633fa0e7SStefan Roese #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 63*633fa0e7SStefan Roese #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 64*633fa0e7SStefan Roese 65*633fa0e7SStefan Roese #define CONFIG_SYS_ALT_MEMTEST 66*633fa0e7SStefan Roese 67*633fa0e7SStefan Roese /* End of 16M scrubbed by training in bootrom */ 68*633fa0e7SStefan Roese #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) 69*633fa0e7SStefan Roese 70*633fa0e7SStefan Roese /* 71*633fa0e7SStefan Roese * SPI Flash configuration 72*633fa0e7SStefan Roese */ 73*633fa0e7SStefan Roese #define CONFIG_KIRKWOOD_SPI 74*633fa0e7SStefan Roese #define CONFIG_ENV_SPI_BUS 0 75*633fa0e7SStefan Roese #define CONFIG_ENV_SPI_CS 0 76*633fa0e7SStefan Roese 77*633fa0e7SStefan Roese /* SPI NOR flash default params, used by sf commands */ 78*633fa0e7SStefan Roese #define CONFIG_SF_DEFAULT_SPEED 1000000 79*633fa0e7SStefan Roese #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 80*633fa0e7SStefan Roese #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 81*633fa0e7SStefan Roese 82*633fa0e7SStefan Roese /* Environment in SPI NOR flash */ 83*633fa0e7SStefan Roese #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ 84*633fa0e7SStefan Roese #define CONFIG_ENV_IS_IN_SPI_FLASH 85*633fa0e7SStefan Roese #define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */ 86*633fa0e7SStefan Roese #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 87*633fa0e7SStefan Roese #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 88*633fa0e7SStefan Roese 89*633fa0e7SStefan Roese /* USB 2.0 */ 90*633fa0e7SStefan Roese #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 91*633fa0e7SStefan Roese 92*633fa0e7SStefan Roese /* USB 3.0 */ 93*633fa0e7SStefan Roese #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3 94*633fa0e7SStefan Roese 95*633fa0e7SStefan Roese #define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \ 96*633fa0e7SStefan Roese CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS) 97*633fa0e7SStefan Roese 98*633fa0e7SStefan Roese /* USB ethernet */ 99*633fa0e7SStefan Roese #define CONFIG_USB_HOST_ETHER 100*633fa0e7SStefan Roese #define CONFIG_USB_ETHER_ASIX 101*633fa0e7SStefan Roese #define CONFIG_USB_ETHER_MCS7830 102*633fa0e7SStefan Roese #define CONFIG_USB_ETHER_RTL8152 103*633fa0e7SStefan Roese #define CONFIG_USB_ETHER_SMSC95XX 104*633fa0e7SStefan Roese 105*633fa0e7SStefan Roese /* 106*633fa0e7SStefan Roese * SATA/SCSI/AHCI configuration 107*633fa0e7SStefan Roese */ 108*633fa0e7SStefan Roese #define CONFIG_SCSI 109*633fa0e7SStefan Roese #define CONFIG_SCSI_AHCI 110*633fa0e7SStefan Roese #define CONFIG_SCSI_AHCI_PLAT 111*633fa0e7SStefan Roese #define CONFIG_LIBATA 112*633fa0e7SStefan Roese #define CONFIG_LBA48 113*633fa0e7SStefan Roese #define CONFIG_SYS_64BIT_LBA 114*633fa0e7SStefan Roese 115*633fa0e7SStefan Roese #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 116*633fa0e7SStefan Roese #define CONFIG_SYS_SCSI_MAX_LUN 1 117*633fa0e7SStefan Roese #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 118*633fa0e7SStefan Roese CONFIG_SYS_SCSI_MAX_LUN) 119*633fa0e7SStefan Roese 120*633fa0e7SStefan Roese #define CONFIG_SUPPORT_VFAT 121*633fa0e7SStefan Roese 122*633fa0e7SStefan Roese /* DISK Partition support */ 123*633fa0e7SStefan Roese #define CONFIG_EFI_PARTITION 124*633fa0e7SStefan Roese #define CONFIG_DOS_PARTITION 125*633fa0e7SStefan Roese #define CONFIG_MAC_PARTITION 126*633fa0e7SStefan Roese #define CONFIG_ISO_PARTITION /* Experimental */ 127*633fa0e7SStefan Roese 128*633fa0e7SStefan Roese #define CONFIG_CMD_PART 129*633fa0e7SStefan Roese #define CONFIG_PARTITION_UUIDS 130*633fa0e7SStefan Roese 131*633fa0e7SStefan Roese #endif /* _CONFIG_MVEBU_ARMADA_8K_H */ 132