xref: /rk3399_rockchip-uboot/include/configs/ms7750se.h (revision 8a7507a8a394f4fccbd7eb730910cf62de6f8d32)
1047375bfSNobuhiro Iwamatsu /*
2047375bfSNobuhiro Iwamatsu  * Configuation settings for the Hitachi Solution Engine 7750
3047375bfSNobuhiro Iwamatsu  *
4047375bfSNobuhiro Iwamatsu  * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5047375bfSNobuhiro Iwamatsu  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7047375bfSNobuhiro Iwamatsu  */
8047375bfSNobuhiro Iwamatsu 
9047375bfSNobuhiro Iwamatsu #ifndef __MS7750SE_H
10047375bfSNobuhiro Iwamatsu #define __MS7750SE_H
1169df3c4dSNobuhiro Iwamatsu 
1269df3c4dSNobuhiro Iwamatsu #define CONFIG_CPU_SH7750	1
13047375bfSNobuhiro Iwamatsu /* #define CONFIG_CPU_SH7751	1 */
14047375bfSNobuhiro Iwamatsu /* #define CONFIG_CPU_TYPE_R	1 */
1569df3c4dSNobuhiro Iwamatsu #define CONFIG_MS7750SE		1
1669df3c4dSNobuhiro Iwamatsu #define __LITTLE_ENDIAN__	1
1769df3c4dSNobuhiro Iwamatsu 
18*18a40e84SVladimir Zapolskiy #define CONFIG_DISPLAY_BOARDINFO
19*18a40e84SVladimir Zapolskiy 
20047375bfSNobuhiro Iwamatsu /*
21047375bfSNobuhiro Iwamatsu  * Command line configuration.
22047375bfSNobuhiro Iwamatsu  */
2369df3c4dSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF1	1
2469df3c4dSNobuhiro Iwamatsu 
2569df3c4dSNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE	1
2669df3c4dSNobuhiro Iwamatsu 
27047375bfSNobuhiro Iwamatsu /* SDRAM */
286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE		(0x8C000000)
296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024)
3069df3c4dSNobuhiro Iwamatsu 
316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP
326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE		256
3369df3c4dSNobuhiro Iwamatsu 
34da8241baSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE		0x8FFC0000
356d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
3614d0a02aSWolfgang Denk #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
3769df3c4dSNobuhiro Iwamatsu 
38047375bfSNobuhiro Iwamatsu /* NOR Flash */
396d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* #define CONFIG_SYS_FLASH_BASE		(0xA1000000)*/
406d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE		(0xA0000000)
416d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS	(1)	/* Max number of
42047375bfSNobuhiro Iwamatsu 					 * Flash memory banks
43047375bfSNobuhiro Iwamatsu 					 */
446d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT	142
456d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
4669df3c4dSNobuhiro Iwamatsu 
476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
486d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)	/* Address of u-boot image in Flash */
496d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)		/* Size of DRAM reserved for malloc() use */
5169df3c4dSNobuhiro Iwamatsu 
526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_RX_ETH_BUFFER	(8)
5469df3c4dSNobuhiro Iwamatsu 
556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI
5600b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER
576d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
586d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef  CONFIG_SYS_FLASH_QUIET_TEST
596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_EMPTY_INFO				/* print 'E' for empty sector on flinfo */
6069df3c4dSNobuhiro Iwamatsu 
610e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	0x20000
620e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT	120000
656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_WRITE_TOUT	500
6669df3c4dSNobuhiro Iwamatsu 
67047375bfSNobuhiro Iwamatsu /* Board Clock */
6869df3c4dSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ	33333333
69684a501eSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
70684a501eSNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
71be45c632SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_TMU_CLK_DIV		4
7269df3c4dSNobuhiro Iwamatsu 
73047375bfSNobuhiro Iwamatsu #endif /* __MS7750SE_H */
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