xref: /rk3399_rockchip-uboot/include/configs/ms7722se.h (revision 3784c789e7e8de3d022ddf198b01e54b68971cd5)
1 /*
2  * Configuation settings for the Hitachi Solution Engine 7722
3  *
4  * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __MS7722SE_H
10 #define __MS7722SE_H
11 
12 #define CONFIG_CPU_SH7722	1
13 #define CONFIG_MS7722SE		1
14 
15 #define CONFIG_DISPLAY_BOARDINFO
16 #undef  CONFIG_SHOW_BOOT_PROGRESS
17 
18 /* SMC9111 */
19 #define CONFIG_SMC91111
20 #define CONFIG_SMC91111_BASE    (0xB8000000)
21 
22 /* MEMORY */
23 #define MS7722SE_SDRAM_BASE	(0x8C000000)
24 #define MS7722SE_FLASH_BASE_1	(0xA0000000)
25 #define MS7722SE_FLASH_BANK_SIZE	(8*1024 * 1024)
26 
27 #define CONFIG_SYS_TEXT_BASE	0x8FFC0000
28 #define CONFIG_SYS_LONGHELP				/* undef to save memory	*/
29 #define CONFIG_SYS_PBSIZE		256		/* Buffer size for Console output */
30 #define CONFIG_SYS_MAXARGS		16		/* max args accepted for monitor commands */
31 #define CONFIG_SYS_BARGSIZE		512		/* Buffer size for Boot Arguments passed to kernel */
32 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate settings for this board */
33 
34 /* SCIF */
35 #define CONFIG_CONS_SCIF0	1
36 
37 #define CONFIG_SYS_MEMTEST_START	(MS7722SE_SDRAM_BASE)
38 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
39 
40 #undef  CONFIG_SYS_ALT_MEMTEST		/* Enable alternate, more extensive, memory test */
41 #undef  CONFIG_SYS_MEMTEST_SCRATCH	/* Scratch address used by the alternate memory test */
42 
43 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE	/* Enable temporary baudrate change while serial download */
44 
45 #define CONFIG_SYS_SDRAM_BASE	(MS7722SE_SDRAM_BASE)
46 #define CONFIG_SYS_SDRAM_SIZE	(64 * 1024 * 1024)	/* maybe more, but if so u-boot doesn't know about it... */
47 
48 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)	/* default load address for scripts ?!? */
49 
50 #define CONFIG_SYS_MONITOR_BASE	(MS7722SE_FLASH_BASE_1)	/* Address of u-boot image
51 							in Flash (NOT run time address in SDRAM) ?!? */
52 #define CONFIG_SYS_MONITOR_LEN	(128 * 1024)		/* */
53 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)		/* Size of DRAM reserved for malloc() use */
54 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
55 
56 /* FLASH */
57 #define CONFIG_SYS_FLASH_CFI
58 #define CONFIG_FLASH_CFI_DRIVER
59 #undef  CONFIG_SYS_FLASH_QUIET_TEST
60 #define CONFIG_SYS_FLASH_EMPTY_INFO			/* print 'E' for empty sector on flinfo */
61 
62 #define CONFIG_SYS_FLASH_BASE		(MS7722SE_FLASH_BASE_1)	/* Physical start address of Flash memory */
63 
64 #define CONFIG_SYS_MAX_FLASH_SECT	150		/* Max number of sectors on each
65 							Flash chip */
66 
67 /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
68 #define CONFIG_SYS_MAX_FLASH_BANKS	2
69 #define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
70 				  CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
71 				}
72 
73 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)	/* Timeout for Flash erase operations (in ms) */
74 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)	/* Timeout for Flash write operations (in ms) */
75 #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)	/* Timeout for Flash set sector lock bit operations (in ms) */
76 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)	/* Timeout for Flash clear lock bit operations (in ms) */
77 
78 #undef  CONFIG_SYS_FLASH_PROTECTION			/* Use hardware flash sectors protection instead of U-Boot software protection */
79 
80 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
81 
82 #define CONFIG_ENV_OVERWRITE	1
83 #define CONFIG_ENV_SECT_SIZE	(8 * 1024)
84 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
85 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
86 #define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)	/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
87 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
88 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
89 
90 /* Board Clock */
91 #define CONFIG_SYS_CLK_FREQ	33333333
92 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
93 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
94 #define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
95 
96 #endif	/* __MS7722SE_H */
97