xref: /rk3399_rockchip-uboot/include/configs/ms7722se.h (revision 33ecdc2f9d64926e1a6067b28f3a0aefc3b6d23d)
1 /*
2  * Configuation settings for the Hitachi Solution Engine 7722
3  *
4  * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22  * MA 02111-1307 USA
23  */
24 
25 #ifndef __MS7722SE_H
26 #define __MS7722SE_H
27 
28 #undef DEBUG
29 #define CONFIG_SH		1
30 #define CONFIG_SH4		1
31 #define CONFIG_CPU_SH7722	1
32 #define CONFIG_MS7722SE		1
33 
34 #define CONFIG_CMD_FLASH
35 #define CONFIG_CMD_NET
36 #define CONFIG_CMD_PING
37 #define CONFIG_CMD_DFL
38 #define CONFIG_CMD_SDRAM
39 #define CONFIG_CMD_ENV
40 
41 #define CONFIG_BAUDRATE		115200
42 #define CONFIG_BOOTDELAY	3
43 #define CONFIG_BOOTARGS    	"console=ttySC0,115200 root=1f01"
44 #define CONFIG_NETMASK          255.255.255.0
45 #define CONFIG_IPADDR		192.168.0.22
46 #define CONFIG_SERVERIP		192.168.0.1
47 #define CONFIG_GATEWAYIP	192.168.0.1
48 
49 #define CONFIG_VERSION_VARIABLE
50 #undef  CONFIG_SHOW_BOOT_PROGRESS
51 
52 /* SMC9111 */
53 #define CONFIG_DRIVER_SMC91111
54 #define CONFIG_SMC91111_BASE    (0xB8000000)
55 
56 /* MEMORY */
57 #define MS7722SE_SDRAM_BASE	(0x8C000000)
58 #define MS7722SE_FLASH_BASE_1	(0xA0000000)
59 //#define MS7722SE_FLASH_BASE_1	(0xA1000000)
60 #define MS7722SE_FLASH_BANK_SIZE	(8*1024 * 1024)
61 
62 #define CFG_LONGHELP				/* undef to save memory	*/
63 #define CFG_PROMPT		"=> "		/* Monitor Command Prompt */
64 #define CFG_CBSIZE		256		/* Buffer size for input from the Console */
65 #define CFG_PBSIZE		256		/* Buffer size for Console output */
66 #define CFG_MAXARGS		16		/* max args accepted for monitor commands */
67 #define CFG_BARGSIZE		512		/* Buffer size for Boot Arguments passed to kernel */
68 #define CFG_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate settings for this board */
69 
70 /* SCIF */
71 #define CFG_SCIF_CONSOLE	1
72 #define CONFIG_CONS_SCIF0	1
73 #undef  CFG_CONSOLE_INFO_QUIET			/* Suppress display of console information at boot */
74 #undef  CFG_CONSOLE_OVERWRITE_ROUTINE
75 #undef  CFG_CONSOLE_ENV_OVERWRITE
76 
77 #define CFG_MEMTEST_START	(MS7722SE_SDRAM_BASE)
78 #define CFG_MEMTEST_END		(CFG_MEMTEST_START + (60 * 1024 * 1024))
79 
80 #undef  CFG_ALT_MEMTEST		/* Enable alternate, more extensive, memory test */
81 #undef  CFG_MEMTEST_SCRATCH	/* Scratch address used by the alternate memory test */
82 
83 #undef  CFG_LOADS_BAUD_CHANGE	/* Enable temporary baudrate change while serial download */
84 
85 #define CFG_SDRAM_BASE	(MS7722SE_SDRAM_BASE)
86 #define CFG_SDRAM_SIZE	(64 * 1024 * 1024)	/* maybe more, but if so u-boot doesn't know about it... */
87 
88 #define CFG_LOAD_ADDR	(CFG_SDRAM_BASE + 4 * 1024 * 1024)	/* default load address for scripts ?!? */
89 
90 #define CFG_MONITOR_BASE	(MS7722SE_FLASH_BASE_1)	/* Address of u-boot image
91 						   	in Flash (NOT run time address in SDRAM) ?!? */
92 #define CFG_MONITOR_LEN	(128 * 1024)		/* */
93 #define CFG_MALLOC_LEN	(256 * 1024)		/* Size of DRAM reserved for malloc() use */
94 #define CFG_GBL_DATA_SIZE	(256)		/* size in bytes reserved for initial data */
95 #define CFG_BOOTMAPSZ	(8 * 1024 * 1024)
96 
97 /* FLASH */
98 #define CFG_FLASH_CFI
99 #define CFG_FLASH_CFI_DRIVER
100 #undef  CFG_FLASH_QUIET_TEST
101 #define CFG_FLASH_EMPTY_INFO			/* print 'E' for empty sector on flinfo */
102 
103 #define CFG_FLASH_BASE		(MS7722SE_FLASH_BASE_1)	/* Physical start address of Flash memory */
104 
105 #define CFG_MAX_FLASH_SECT	150		/* Max number of sectors on each
106 				   			Flash chip */
107 
108 /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
109 #define CFG_MAX_FLASH_BANKS	2
110 #define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
111 				  CFG_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
112 				}
113 
114 #define CFG_FLASH_ERASE_TOUT	(3 * 1000)	/* Timeout for Flash erase operations (in ms) */
115 #define CFG_FLASH_WRITE_TOUT	(3 * 1000)	/* Timeout for Flash write operations (in ms) */
116 #define CFG_FLASH_LOCK_TOUT	(3 * 1000)	/* Timeout for Flash set sector lock bit operations (in ms) */
117 #define CFG_FLASH_UNLOCK_TOUT	(3 * 1000)	/* Timeout for Flash clear lock bit operations (in ms) */
118 
119 #undef  CFG_FLASH_PROTECTION			/* Use hardware flash sectors protection instead of U-Boot software protection */
120 
121 #undef  CFG_DIRECT_FLASH_TFTP
122 
123 #define CFG_ENV_IS_IN_FLASH
124 #define CONFIG_ENV_OVERWRITE	1
125 #define CFG_ENV_SECT_SIZE	(8 * 1024)
126 #define CFG_ENV_SIZE		(CFG_ENV_SECT_SIZE)
127 #define CFG_ENV_ADDR		(CFG_FLASH_BASE + (1 * CFG_ENV_SECT_SIZE))
128 #define CFG_ENV_OFFSET		(CFG_ENV_ADDR - CFG_FLASH_BASE) 	/* Offset of env Flash sector relative to CFG_FLASH_BASE */
129 #define CFG_ENV_SIZE_REDUND	(CFG_ENV_SECT_SIZE)
130 #define CFG_ENV_ADDR_REDUND	(CFG_FLASH_BASE + (2 * CFG_ENV_SECT_SIZE))
131 
132 /* Board Clock */
133 #define CONFIG_SYS_CLK_FREQ	33333333
134 #define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
135 #define CFG_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
136 
137 #endif	/* __MS7722SE_H */
138