16c0bbdccSNobuhiro Iwamatsu /* 26c0bbdccSNobuhiro Iwamatsu * Configuation settings for the Hitachi Solution Engine 7722 36c0bbdccSNobuhiro Iwamatsu * 46c0bbdccSNobuhiro Iwamatsu * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 56c0bbdccSNobuhiro Iwamatsu * 61a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 76c0bbdccSNobuhiro Iwamatsu */ 86c0bbdccSNobuhiro Iwamatsu 96c0bbdccSNobuhiro Iwamatsu #ifndef __MS7722SE_H 106c0bbdccSNobuhiro Iwamatsu #define __MS7722SE_H 116c0bbdccSNobuhiro Iwamatsu 126c0bbdccSNobuhiro Iwamatsu #define CONFIG_CPU_SH7722 1 136c0bbdccSNobuhiro Iwamatsu #define CONFIG_MS7722SE 1 146c0bbdccSNobuhiro Iwamatsu 15*18a40e84SVladimir Zapolskiy #define CONFIG_DISPLAY_BOARDINFO 166c0bbdccSNobuhiro Iwamatsu #undef CONFIG_SHOW_BOOT_PROGRESS 176c0bbdccSNobuhiro Iwamatsu 186c0bbdccSNobuhiro Iwamatsu /* SMC9111 */ 197194ab80SBen Warren #define CONFIG_SMC91111 206c0bbdccSNobuhiro Iwamatsu #define CONFIG_SMC91111_BASE (0xB8000000) 216c0bbdccSNobuhiro Iwamatsu 226c0bbdccSNobuhiro Iwamatsu /* MEMORY */ 236c0bbdccSNobuhiro Iwamatsu #define MS7722SE_SDRAM_BASE (0x8C000000) 246c0bbdccSNobuhiro Iwamatsu #define MS7722SE_FLASH_BASE_1 (0xA0000000) 256c0bbdccSNobuhiro Iwamatsu #define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024) 266c0bbdccSNobuhiro Iwamatsu 275c1877d6SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP /* undef to save memory */ 296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ 316c0bbdccSNobuhiro Iwamatsu 326c0bbdccSNobuhiro Iwamatsu /* SCIF */ 336c0bbdccSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0 1 346c0bbdccSNobuhiro Iwamatsu 356d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE) 366d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 376c0bbdccSNobuhiro Iwamatsu 386d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_ALT_MEMTEST /* Enable alternate, more extensive, memory test */ 396d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */ 406c0bbdccSNobuhiro Iwamatsu 416d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */ 426c0bbdccSNobuhiro Iwamatsu 436d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE) 446d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */ 456c0bbdccSNobuhiro Iwamatsu 466d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */ 476c0bbdccSNobuhiro Iwamatsu 486d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image 496c0bbdccSNobuhiro Iwamatsu in Flash (NOT run time address in SDRAM) ?!? */ 506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */ 516d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ 526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 536c0bbdccSNobuhiro Iwamatsu 546c0bbdccSNobuhiro Iwamatsu /* FLASH */ 556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI 5600b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER 576d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_FLASH_QUIET_TEST 586d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 596c0bbdccSNobuhiro Iwamatsu 606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */ 616c0bbdccSNobuhiro Iwamatsu 626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each 636c0bbdccSNobuhiro Iwamatsu Flash chip */ 646c0bbdccSNobuhiro Iwamatsu 656c0bbdccSNobuhiro Iwamatsu /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */ 666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS 2 676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \ 686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \ 696c0bbdccSNobuhiro Iwamatsu } 706c0bbdccSNobuhiro Iwamatsu 716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */ 726d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */ 736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */ 746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */ 756c0bbdccSNobuhiro Iwamatsu 766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */ 776c0bbdccSNobuhiro Iwamatsu 786d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_DIRECT_FLASH_TFTP 796c0bbdccSNobuhiro Iwamatsu 806c0bbdccSNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE 1 810e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE (8 * 1024) 820e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE)) 846d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 850e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 866d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 876c0bbdccSNobuhiro Iwamatsu 886c0bbdccSNobuhiro Iwamatsu /* Board Clock */ 896c0bbdccSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 33333333 90684a501eSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 91684a501eSNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 92be45c632SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 936c0bbdccSNobuhiro Iwamatsu 946c0bbdccSNobuhiro Iwamatsu #endif /* __MS7722SE_H */ 95