1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 #ifdef XILINX_UARTLITE_BASEADDR 36 # define CONFIG_XILINX_UARTLITE 37 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR 38 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE 39 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 40 # define CONSOLE_ARG "console=console=ttyUL0,115200\0" 41 #elif XILINX_UART16550_BASEADDR 42 # define CONFIG_SYS_NS16550_SERIAL 43 # if defined(__MICROBLAZEEL__) 44 # define CONFIG_SYS_NS16550_REG_SIZE -4 45 # else 46 # define CONFIG_SYS_NS16550_REG_SIZE 4 47 # endif 48 # define CONFIG_CONS_INDEX 1 49 # define CONFIG_SYS_NS16550_COM1 \ 50 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) 51 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ 52 # define CONFIG_BAUDRATE 115200 53 54 /* The following table includes the supported baudrates */ 55 # define CONFIG_SYS_BAUDRATE_TABLE \ 56 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 57 # define CONSOLE_ARG "console=console=ttyS0,115200\0" 58 #else 59 # error Undefined uart 60 #endif 61 62 /* setting reset address */ 63 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 64 65 /* ethernet */ 66 #undef CONFIG_SYS_ENET 67 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL) 68 # define CONFIG_XILINX_EMACLITE 1 69 # define CONFIG_SYS_ENET 70 #endif 71 #if defined(XILINX_LLTEMAC_BASEADDR) 72 # define CONFIG_XILINX_LL_TEMAC 1 73 # define CONFIG_SYS_ENET 74 #endif 75 #if defined(XILINX_AXIEMAC_BASEADDR) 76 # define CONFIG_XILINX_AXIEMAC 1 77 # define CONFIG_SYS_ENET 78 #endif 79 80 #undef ET_DEBUG 81 82 /* gpio */ 83 #ifdef XILINX_GPIO_BASEADDR 84 # define CONFIG_XILINX_GPIO 85 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 86 #endif 87 88 /* interrupt controller */ 89 #ifdef XILINX_INTC_BASEADDR 90 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR 91 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS 92 #endif 93 94 /* timer */ 95 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) 96 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR 97 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ 98 #endif 99 100 /* watchdog */ 101 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 102 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 103 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 104 # define CONFIG_HW_WATCHDOG 105 # define CONFIG_XILINX_TB_WATCHDOG 106 #endif 107 108 #if !defined(CONFIG_OF_CONTROL) || \ 109 (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL)) 110 /* ddr sdram - main memory */ 111 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START 112 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE 113 #endif 114 115 #define CONFIG_SYS_MALLOC_LEN 0xC0000 116 #ifndef CONFIG_SPL_BUILD 117 # define CONFIG_SYS_MALLOC_F_LEN 1024 118 #else 119 # define CONFIG_SYS_MALLOC_SIMPLE 120 # define CONFIG_SYS_MALLOC_F_LEN 0x150 121 #endif 122 123 /* Stack location before relocation */ 124 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 125 CONFIG_SYS_MALLOC_F_LEN) 126 127 /* 128 * CFI flash memory layout - Example 129 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 130 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 131 * 132 * SECT_SIZE = 0x20000; 128kB is one sector 133 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 134 * 135 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 136 * FREE 256kB 137 * 0x2204_0000 CONFIG_ENV_ADDR 138 * ENV_AREA 128kB 139 * 0x2206_0000 140 * FREE 141 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 142 * 143 */ 144 145 #ifdef FLASH 146 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 147 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 148 # define CONFIG_SYS_FLASH_CFI 1 149 # define CONFIG_FLASH_CFI_DRIVER 1 150 /* ?empty sector */ 151 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 152 /* max number of memory banks */ 153 # define CONFIG_SYS_MAX_FLASH_BANKS 1 154 /* max number of sectors on one chip */ 155 # define CONFIG_SYS_MAX_FLASH_SECT 512 156 /* hardware flash protection */ 157 # define CONFIG_SYS_FLASH_PROTECTION 158 /* use buffered writes (20x faster) */ 159 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 160 # ifdef RAMENV 161 # define CONFIG_ENV_IS_NOWHERE 1 162 # define CONFIG_ENV_SIZE 0x1000 163 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 164 165 # else /* FLASH && !RAMENV */ 166 # define CONFIG_ENV_IS_IN_FLASH 1 167 /* 128K(one sector) for env */ 168 # define CONFIG_ENV_SECT_SIZE 0x20000 169 # define CONFIG_ENV_ADDR \ 170 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 171 # define CONFIG_ENV_SIZE 0x20000 172 # endif /* FLASH && !RAMBOOT */ 173 #else /* !FLASH */ 174 175 #ifdef SPIFLASH 176 # define CONFIG_SYS_NO_FLASH 1 177 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 178 # define CONFIG_SPI 1 179 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 180 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 181 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 182 183 # ifdef RAMENV 184 # define CONFIG_ENV_IS_NOWHERE 1 185 # define CONFIG_ENV_SIZE 0x1000 186 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 187 188 # else /* SPIFLASH && !RAMENV */ 189 # define CONFIG_ENV_IS_IN_SPI_FLASH 1 190 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 191 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 192 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 193 /* 128K(two sectors) for env */ 194 # define CONFIG_ENV_SECT_SIZE 0x10000 195 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 196 /* Warning: adjust the offset in respect of other flash content and size */ 197 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 198 # endif /* SPIFLASH && !RAMBOOT */ 199 #else /* !SPIFLASH */ 200 201 /* ENV in RAM */ 202 # define CONFIG_SYS_NO_FLASH 1 203 # define CONFIG_ENV_IS_NOWHERE 1 204 # define CONFIG_ENV_SIZE 0x1000 205 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 206 #endif /* !SPIFLASH */ 207 #endif /* !FLASH */ 208 209 /* system ace */ 210 #ifdef XILINX_SYSACE_BASEADDR 211 # define CONFIG_SYSTEMACE 212 /* #define DEBUG_SYSTEMACE */ 213 # define SYSTEMACE_CONFIG_FPGA 214 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR 215 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH 216 # define CONFIG_DOS_PARTITION 217 #endif 218 219 #if defined(XILINX_USE_ICACHE) 220 # define CONFIG_ICACHE 221 #else 222 # undef CONFIG_ICACHE 223 #endif 224 225 #if defined(XILINX_USE_DCACHE) 226 # define CONFIG_DCACHE 227 #else 228 # undef CONFIG_DCACHE 229 #endif 230 231 #ifndef XILINX_DCACHE_BYTE_SIZE 232 #define XILINX_DCACHE_BYTE_SIZE 32768 233 #endif 234 235 /* 236 * BOOTP options 237 */ 238 #define CONFIG_BOOTP_BOOTFILESIZE 239 #define CONFIG_BOOTP_BOOTPATH 240 #define CONFIG_BOOTP_GATEWAY 241 #define CONFIG_BOOTP_HOSTNAME 242 243 /* 244 * Command line configuration. 245 */ 246 #define CONFIG_CMD_ASKENV 247 #define CONFIG_CMD_IRQ 248 #define CONFIG_CMD_MFSL 249 250 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) 251 # define CONFIG_CMD_CACHE 252 #else 253 # undef CONFIG_CMD_CACHE 254 #endif 255 256 #ifdef CONFIG_SYS_ENET 257 # define CONFIG_CMD_PING 258 # define CONFIG_CMD_DHCP 259 # define CONFIG_CMD_TFTPPUT 260 #endif 261 262 #if defined(CONFIG_SYSTEMACE) 263 # define CONFIG_CMD_EXT2 264 # define CONFIG_CMD_FAT 265 #endif 266 267 #if defined(FLASH) 268 # define CONFIG_CMD_JFFS2 269 # define CONFIG_CMD_UBI 270 # undef CONFIG_CMD_UBIFS 271 272 # if !defined(RAMENV) 273 # define CONFIG_CMD_SAVES 274 # endif 275 276 #else 277 #if defined(SPIFLASH) 278 # define CONFIG_CMD_SF 279 280 # if !defined(RAMENV) 281 # define CONFIG_CMD_SAVES 282 # endif 283 #else 284 # undef CONFIG_CMD_JFFS2 285 # undef CONFIG_CMD_UBI 286 # undef CONFIG_CMD_UBIFS 287 #endif 288 #endif 289 290 #if defined(CONFIG_CMD_JFFS2) 291 # define CONFIG_MTD_PARTITIONS 292 #endif 293 294 #if defined(CONFIG_CMD_UBIFS) 295 # define CONFIG_CMD_UBI 296 # define CONFIG_LZO 297 #endif 298 299 #if defined(CONFIG_CMD_UBI) 300 # define CONFIG_MTD_PARTITIONS 301 # define CONFIG_RBTREE 302 #endif 303 304 #if defined(CONFIG_MTD_PARTITIONS) 305 /* MTD partitions */ 306 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 307 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 308 #define CONFIG_FLASH_CFI_MTD 309 #define MTDIDS_DEFAULT "nor0=flash-0" 310 311 /* default mtd partition table */ 312 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 313 "256k(env),3m(kernel),1m(romfs),"\ 314 "1m(cramfs),-(jffs2)" 315 #endif 316 317 /* size of console buffer */ 318 #define CONFIG_SYS_CBSIZE 512 319 /* print buffer size */ 320 #define CONFIG_SYS_PBSIZE \ 321 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 322 /* max number of command args */ 323 #define CONFIG_SYS_MAXARGS 15 324 #define CONFIG_SYS_LONGHELP 325 /* default load address */ 326 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START 327 328 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ 329 #define CONFIG_BOOTARGS "root=romfs" 330 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 331 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 332 #define CONFIG_IPADDR 192.168.0.3 333 #define CONFIG_SERVERIP 192.168.0.5 334 #define CONFIG_GATEWAYIP 192.168.0.1 335 336 /* architecture dependent code */ 337 #define CONFIG_SYS_USR_EXCEP /* user exception */ 338 339 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 340 341 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 342 "nor0=flash-0\0"\ 343 "mtdparts=mtdparts=flash-0:"\ 344 "256k(u-boot),256k(env),3m(kernel),"\ 345 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 346 "nc=setenv stdout nc;"\ 347 "setenv stdin nc\0" \ 348 "serial=setenv stdout serial;"\ 349 "setenv stdin serial\0" 350 351 #define CONFIG_CMDLINE_EDITING 352 353 #define CONFIG_NETCONSOLE 354 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 355 356 /* Use the HUSH parser */ 357 #define CONFIG_SYS_HUSH_PARSER 358 359 /* Enable flat device tree support */ 360 #define CONFIG_LMB 1 361 #define CONFIG_FIT 1 362 #define CONFIG_OF_LIBFDT 1 363 364 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) 365 # define CONFIG_MII 1 366 # define CONFIG_CMD_MII 1 367 # define CONFIG_PHY_GIGE 1 368 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 369 # define CONFIG_PHYLIB 1 370 # define CONFIG_PHY_ATHEROS 1 371 # define CONFIG_PHY_BROADCOM 1 372 # define CONFIG_PHY_DAVICOM 1 373 # define CONFIG_PHY_LXT 1 374 # define CONFIG_PHY_MARVELL 1 375 # define CONFIG_PHY_MICREL 1 376 # define CONFIG_PHY_NATSEMI 1 377 # define CONFIG_PHY_REALTEK 1 378 # define CONFIG_PHY_VITESSE 1 379 #else 380 # undef CONFIG_MII 381 # undef CONFIG_CMD_MII 382 # undef CONFIG_PHYLIB 383 #endif 384 385 /* SPL part */ 386 #define CONFIG_CMD_SPL 387 #define CONFIG_SPL_FRAMEWORK 388 #define CONFIG_SPL_LIBCOMMON_SUPPORT 389 #define CONFIG_SPL_LIBGENERIC_SUPPORT 390 #define CONFIG_SPL_SERIAL_SUPPORT 391 #define CONFIG_SPL_BOARD_INIT 392 393 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" 394 395 #define CONFIG_SPL_RAM_DEVICE 396 #ifdef CONFIG_SYS_FLASH_BASE 397 # define CONFIG_SPL_NOR_SUPPORT 398 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 399 #endif 400 401 /* for booting directly linux */ 402 #define CONFIG_SPL_OS_BOOT 403 404 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \ 405 0x60000) 406 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 407 0x40000) 408 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 409 0x1000000) 410 411 /* SP location before relocation, must use scratch RAM */ 412 /* BRAM start */ 413 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 414 /* BRAM size - will be generated */ 415 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 416 417 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 418 CONFIG_SYS_INIT_RAM_SIZE - \ 419 CONFIG_SYS_MALLOC_F_LEN) 420 421 /* Just for sure that there is a space for stack */ 422 #define CONFIG_SPL_STACK_SIZE 0x100 423 424 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 425 426 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 427 CONFIG_SYS_INIT_RAM_ADDR - \ 428 CONFIG_SYS_MALLOC_F_LEN - \ 429 CONFIG_SPL_STACK_SIZE) 430 431 #endif /* __CONFIG_H */ 432