1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 #ifdef XILINX_UARTLITE_BASEADDR 36 # define CONFIG_XILINX_UARTLITE 37 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR 38 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE 39 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 40 # define CONSOLE_ARG "console=console=ttyUL0,115200\0" 41 #elif XILINX_UART16550_BASEADDR 42 # define CONFIG_SYS_NS16550_SERIAL 43 # if defined(__MICROBLAZEEL__) 44 # define CONFIG_SYS_NS16550_REG_SIZE -4 45 # else 46 # define CONFIG_SYS_NS16550_REG_SIZE 4 47 # endif 48 # define CONFIG_CONS_INDEX 1 49 # define CONFIG_SYS_NS16550_COM1 \ 50 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) 51 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ 52 # define CONFIG_BAUDRATE 115200 53 54 /* The following table includes the supported baudrates */ 55 # define CONFIG_SYS_BAUDRATE_TABLE \ 56 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 57 # define CONSOLE_ARG "console=console=ttyS0,115200\0" 58 #else 59 # error Undefined uart 60 #endif 61 62 /* setting reset address */ 63 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 64 65 /* ethernet */ 66 #undef CONFIG_SYS_ENET 67 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL) 68 # define CONFIG_XILINX_EMACLITE 1 69 # define CONFIG_SYS_ENET 70 #endif 71 #if defined(XILINX_LLTEMAC_BASEADDR) 72 # define CONFIG_XILINX_LL_TEMAC 1 73 # define CONFIG_SYS_ENET 74 #endif 75 #if defined(XILINX_AXIEMAC_BASEADDR) 76 # define CONFIG_XILINX_AXIEMAC 1 77 # define CONFIG_SYS_ENET 78 #endif 79 80 #undef ET_DEBUG 81 82 /* gpio */ 83 #ifdef XILINX_GPIO_BASEADDR 84 # define CONFIG_XILINX_GPIO 85 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 86 #endif 87 88 /* interrupt controller */ 89 #ifdef XILINX_INTC_BASEADDR 90 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR 91 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS 92 #endif 93 94 /* timer */ 95 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) 96 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR 97 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ 98 #endif 99 100 /* watchdog */ 101 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 102 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 103 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 104 # define CONFIG_HW_WATCHDOG 105 # define CONFIG_XILINX_TB_WATCHDOG 106 #endif 107 108 #if !defined(CONFIG_OF_CONTROL) || \ 109 (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL)) 110 /* ddr sdram - main memory */ 111 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START 112 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE 113 #endif 114 115 #define CONFIG_SYS_MALLOC_LEN 0xC0000 116 117 /* Stack location before relocation */ 118 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 119 CONFIG_SYS_MALLOC_F_LEN) 120 121 /* 122 * CFI flash memory layout - Example 123 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 124 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 125 * 126 * SECT_SIZE = 0x20000; 128kB is one sector 127 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 128 * 129 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 130 * FREE 256kB 131 * 0x2204_0000 CONFIG_ENV_ADDR 132 * ENV_AREA 128kB 133 * 0x2206_0000 134 * FREE 135 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 136 * 137 */ 138 139 #ifdef FLASH 140 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 141 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 142 # define CONFIG_SYS_FLASH_CFI 1 143 # define CONFIG_FLASH_CFI_DRIVER 1 144 /* ?empty sector */ 145 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 146 /* max number of memory banks */ 147 # define CONFIG_SYS_MAX_FLASH_BANKS 1 148 /* max number of sectors on one chip */ 149 # define CONFIG_SYS_MAX_FLASH_SECT 512 150 /* hardware flash protection */ 151 # define CONFIG_SYS_FLASH_PROTECTION 152 /* use buffered writes (20x faster) */ 153 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 154 # ifdef RAMENV 155 # define CONFIG_ENV_IS_NOWHERE 1 156 # define CONFIG_ENV_SIZE 0x1000 157 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 158 159 # else /* FLASH && !RAMENV */ 160 # define CONFIG_ENV_IS_IN_FLASH 1 161 /* 128K(one sector) for env */ 162 # define CONFIG_ENV_SECT_SIZE 0x20000 163 # define CONFIG_ENV_ADDR \ 164 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 165 # define CONFIG_ENV_SIZE 0x20000 166 # endif /* FLASH && !RAMBOOT */ 167 #else /* !FLASH */ 168 169 #ifdef SPIFLASH 170 # define CONFIG_SYS_NO_FLASH 1 171 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 172 # define CONFIG_SPI 1 173 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 174 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 175 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 176 177 # ifdef RAMENV 178 # define CONFIG_ENV_IS_NOWHERE 1 179 # define CONFIG_ENV_SIZE 0x1000 180 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 181 182 # else /* SPIFLASH && !RAMENV */ 183 # define CONFIG_ENV_IS_IN_SPI_FLASH 1 184 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 185 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 186 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 187 /* 128K(two sectors) for env */ 188 # define CONFIG_ENV_SECT_SIZE 0x10000 189 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 190 /* Warning: adjust the offset in respect of other flash content and size */ 191 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 192 # endif /* SPIFLASH && !RAMBOOT */ 193 #else /* !SPIFLASH */ 194 195 /* ENV in RAM */ 196 # define CONFIG_SYS_NO_FLASH 1 197 # define CONFIG_ENV_IS_NOWHERE 1 198 # define CONFIG_ENV_SIZE 0x1000 199 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 200 #endif /* !SPIFLASH */ 201 #endif /* !FLASH */ 202 203 /* system ace */ 204 #ifdef XILINX_SYSACE_BASEADDR 205 # define CONFIG_SYSTEMACE 206 /* #define DEBUG_SYSTEMACE */ 207 # define SYSTEMACE_CONFIG_FPGA 208 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR 209 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH 210 # define CONFIG_DOS_PARTITION 211 #endif 212 213 #if defined(XILINX_USE_ICACHE) 214 # define CONFIG_ICACHE 215 #else 216 # undef CONFIG_ICACHE 217 #endif 218 219 #if defined(XILINX_USE_DCACHE) 220 # define CONFIG_DCACHE 221 #else 222 # undef CONFIG_DCACHE 223 #endif 224 225 #ifndef XILINX_DCACHE_BYTE_SIZE 226 #define XILINX_DCACHE_BYTE_SIZE 32768 227 #endif 228 229 /* 230 * BOOTP options 231 */ 232 #define CONFIG_BOOTP_BOOTFILESIZE 233 #define CONFIG_BOOTP_BOOTPATH 234 #define CONFIG_BOOTP_GATEWAY 235 #define CONFIG_BOOTP_HOSTNAME 236 237 /* 238 * Command line configuration. 239 */ 240 #define CONFIG_CMD_ASKENV 241 #define CONFIG_CMD_IRQ 242 #define CONFIG_CMD_MFSL 243 244 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) 245 # define CONFIG_CMD_CACHE 246 #else 247 # undef CONFIG_CMD_CACHE 248 #endif 249 250 #ifdef CONFIG_SYS_ENET 251 # define CONFIG_CMD_PING 252 # define CONFIG_CMD_DHCP 253 # define CONFIG_CMD_TFTPPUT 254 #endif 255 256 #if defined(CONFIG_SYSTEMACE) 257 # define CONFIG_CMD_EXT2 258 # define CONFIG_CMD_FAT 259 #endif 260 261 #if defined(FLASH) 262 # define CONFIG_CMD_JFFS2 263 # define CONFIG_CMD_UBI 264 # undef CONFIG_CMD_UBIFS 265 266 # if !defined(RAMENV) 267 # define CONFIG_CMD_SAVES 268 # endif 269 270 #else 271 #if defined(SPIFLASH) 272 # define CONFIG_CMD_SF 273 274 # if !defined(RAMENV) 275 # define CONFIG_CMD_SAVES 276 # endif 277 #else 278 # undef CONFIG_CMD_JFFS2 279 # undef CONFIG_CMD_UBI 280 # undef CONFIG_CMD_UBIFS 281 #endif 282 #endif 283 284 #if defined(CONFIG_CMD_JFFS2) 285 # define CONFIG_MTD_PARTITIONS 286 #endif 287 288 #if defined(CONFIG_CMD_UBIFS) 289 # define CONFIG_CMD_UBI 290 # define CONFIG_LZO 291 #endif 292 293 #if defined(CONFIG_CMD_UBI) 294 # define CONFIG_MTD_PARTITIONS 295 # define CONFIG_RBTREE 296 #endif 297 298 #if defined(CONFIG_MTD_PARTITIONS) 299 /* MTD partitions */ 300 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 301 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 302 #define CONFIG_FLASH_CFI_MTD 303 #define MTDIDS_DEFAULT "nor0=flash-0" 304 305 /* default mtd partition table */ 306 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 307 "256k(env),3m(kernel),1m(romfs),"\ 308 "1m(cramfs),-(jffs2)" 309 #endif 310 311 /* size of console buffer */ 312 #define CONFIG_SYS_CBSIZE 512 313 /* print buffer size */ 314 #define CONFIG_SYS_PBSIZE \ 315 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 316 /* max number of command args */ 317 #define CONFIG_SYS_MAXARGS 15 318 #define CONFIG_SYS_LONGHELP 319 /* default load address */ 320 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START 321 322 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ 323 #define CONFIG_BOOTARGS "root=romfs" 324 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 325 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 326 #define CONFIG_IPADDR 192.168.0.3 327 #define CONFIG_SERVERIP 192.168.0.5 328 #define CONFIG_GATEWAYIP 192.168.0.1 329 330 /* architecture dependent code */ 331 #define CONFIG_SYS_USR_EXCEP /* user exception */ 332 333 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 334 335 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 336 "nor0=flash-0\0"\ 337 "mtdparts=mtdparts=flash-0:"\ 338 "256k(u-boot),256k(env),3m(kernel),"\ 339 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 340 "nc=setenv stdout nc;"\ 341 "setenv stdin nc\0" \ 342 "serial=setenv stdout serial;"\ 343 "setenv stdin serial\0" 344 345 #define CONFIG_CMDLINE_EDITING 346 347 #define CONFIG_NETCONSOLE 348 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 349 350 /* Use the HUSH parser */ 351 #define CONFIG_SYS_HUSH_PARSER 352 353 /* Enable flat device tree support */ 354 #define CONFIG_LMB 1 355 #define CONFIG_FIT 1 356 #define CONFIG_OF_LIBFDT 1 357 358 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) 359 # define CONFIG_MII 1 360 # define CONFIG_CMD_MII 1 361 # define CONFIG_PHY_GIGE 1 362 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 363 # define CONFIG_PHYLIB 1 364 # define CONFIG_PHY_ATHEROS 1 365 # define CONFIG_PHY_BROADCOM 1 366 # define CONFIG_PHY_DAVICOM 1 367 # define CONFIG_PHY_LXT 1 368 # define CONFIG_PHY_MARVELL 1 369 # define CONFIG_PHY_MICREL 1 370 # define CONFIG_PHY_NATSEMI 1 371 # define CONFIG_PHY_REALTEK 1 372 # define CONFIG_PHY_VITESSE 1 373 #else 374 # undef CONFIG_MII 375 # undef CONFIG_CMD_MII 376 # undef CONFIG_PHYLIB 377 #endif 378 379 /* SPL part */ 380 #define CONFIG_CMD_SPL 381 #define CONFIG_SPL_FRAMEWORK 382 #define CONFIG_SPL_LIBCOMMON_SUPPORT 383 #define CONFIG_SPL_LIBGENERIC_SUPPORT 384 #define CONFIG_SPL_SERIAL_SUPPORT 385 #define CONFIG_SPL_BOARD_INIT 386 387 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" 388 389 #define CONFIG_SPL_RAM_DEVICE 390 #ifdef CONFIG_SYS_FLASH_BASE 391 # define CONFIG_SPL_NOR_SUPPORT 392 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 393 #endif 394 395 /* for booting directly linux */ 396 #define CONFIG_SPL_OS_BOOT 397 398 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \ 399 0x60000) 400 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 401 0x40000) 402 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 403 0x1000000) 404 405 /* SP location before relocation, must use scratch RAM */ 406 /* BRAM start */ 407 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 408 /* BRAM size - will be generated */ 409 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 410 411 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 412 CONFIG_SYS_INIT_RAM_SIZE - \ 413 CONFIG_SYS_MALLOC_F_LEN) 414 415 /* Just for sure that there is a space for stack */ 416 #define CONFIG_SPL_STACK_SIZE 0x100 417 418 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 419 420 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 421 CONFIG_SYS_INIT_RAM_ADDR - \ 422 CONFIG_SYS_MALLOC_F_LEN - \ 423 CONFIG_SPL_STACK_SIZE) 424 425 #endif /* __CONFIG_H */ 426