1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #ifndef __CONFIG_H 26 #define __CONFIG_H 27 28 #include "../board/xilinx/microblaze-generic/xparameters.h" 29 30 /* MicroBlaze CPU */ 31 #define CONFIG_MICROBLAZE 1 32 #define MICROBLAZE_V5 1 33 34 /* Open Firmware DTS */ 35 #define CONFIG_OF_CONTROL 1 36 #define CONFIG_OF_EMBED 1 37 #define CONFIG_DEFAULT_DEVICE_TREE microblaze 38 39 /* linear flash memory */ 40 #ifdef XILINX_FLASH_START 41 #define FLASH 42 #undef RAMENV /* hold environment in flash */ 43 #else 44 #undef FLASH 45 #define RAMENV /* hold environment in RAM */ 46 #endif 47 48 /* uart */ 49 #ifdef XILINX_UARTLITE_BASEADDR 50 # define CONFIG_XILINX_UARTLITE 51 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR 52 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE 53 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 54 # define CONSOLE_ARG "console=console=ttyUL0,115200\0" 55 #elif XILINX_UART16550_BASEADDR 56 # define CONFIG_SYS_NS16550 1 57 # define CONFIG_SYS_NS16550_SERIAL 58 # if defined(__MICROBLAZEEL__) 59 # define CONFIG_SYS_NS16550_REG_SIZE -4 60 # else 61 # define CONFIG_SYS_NS16550_REG_SIZE 4 62 # endif 63 # define CONFIG_CONS_INDEX 1 64 # define CONFIG_SYS_NS16550_COM1 \ 65 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) 66 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ 67 # define CONFIG_BAUDRATE 115200 68 69 /* The following table includes the supported baudrates */ 70 # define CONFIG_SYS_BAUDRATE_TABLE \ 71 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 72 # define CONSOLE_ARG "console=console=ttyS0,115200\0" 73 #else 74 # error Undefined uart 75 #endif 76 77 /* setting reset address */ 78 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 79 80 /* ethernet */ 81 #undef CONFIG_SYS_ENET 82 #if defined(XILINX_EMACLITE_BASEADDR) 83 # define CONFIG_XILINX_EMACLITE 1 84 # define CONFIG_SYS_ENET 85 #endif 86 #if defined(XILINX_LLTEMAC_BASEADDR) 87 # define CONFIG_XILINX_LL_TEMAC 1 88 # define CONFIG_SYS_ENET 89 #endif 90 #if defined(XILINX_AXIEMAC_BASEADDR) 91 # define CONFIG_XILINX_AXIEMAC 1 92 # define CONFIG_SYS_ENET 93 #endif 94 95 #undef ET_DEBUG 96 97 /* gpio */ 98 #ifdef XILINX_GPIO_BASEADDR 99 # define CONFIG_SYS_GPIO_0 1 100 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 101 #endif 102 103 /* interrupt controller */ 104 #ifdef XILINX_INTC_BASEADDR 105 # define CONFIG_SYS_INTC_0 1 106 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR 107 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS 108 #endif 109 110 /* timer */ 111 #ifdef XILINX_TIMER_BASEADDR 112 # if (XILINX_TIMER_IRQ != -1) 113 # define CONFIG_SYS_TIMER_0 1 114 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR 115 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ 116 # define FREQUENCE XILINX_CLOCK_FREQ 117 # define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) 118 # endif 119 #elif XILINX_CLOCK_FREQ 120 # define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ 121 #else 122 # error BAD CLOCK FREQ 123 #endif 124 /* FSL */ 125 /* #define CONFIG_SYS_FSL_2 */ 126 /* #define FSL_INTR_2 1 */ 127 128 /* 129 * memory layout - Example 130 * CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk 131 * CONFIG_SYS_SRAM_BASE = 0x1000_0000; 132 * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; 64MB 133 * 134 * CONFIG_SYS_MONITOR_LEN = 0x40000 135 * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000 136 * 137 * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 138 * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000 139 * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000 140 * 141 * 0x1000_0000 CONFIG_SYS_SDRAM_BASE 142 * MEMTEST_AREA 64kB 143 * FREE 144 * 0x1200_0000 CONFIG_SYS_TEXT_BASE 145 * U-BOOT code 146 * 0x1202_0000 147 * FREE 148 * 149 * STACK 150 * 0x13EF_F000 CONFIG_SYS_MALLOC_BASE 151 * MALLOC_AREA 768kB Alloc 152 * 0x13FB_F000 CONFIG_SYS_MONITOR_BASE 153 * MONITOR_CODE 256kB Env 154 * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET 155 * GLOBAL_DATA 4kB bd, gd 156 * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE 157 */ 158 159 /* ddr sdram - main memory */ 160 #define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START 161 #define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE 162 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 163 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 164 165 /* global pointer */ 166 /* start of global data */ 167 #define CONFIG_SYS_GBL_DATA_OFFSET \ 168 (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE) 169 170 /* monitor code */ 171 #define SIZE 0x40000 172 #define CONFIG_SYS_MONITOR_LEN SIZE 173 #define CONFIG_SYS_MONITOR_BASE \ 174 (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \ 175 - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE) 176 #define CONFIG_SYS_MONITOR_END \ 177 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 178 #define CONFIG_SYS_MALLOC_LEN (SIZE * 3) 179 #define CONFIG_SYS_MALLOC_BASE \ 180 (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) 181 182 /* stack */ 183 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE 184 185 /* 186 * CFI flash memory layout - Example 187 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 188 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 189 * 190 * SECT_SIZE = 0x20000; 128kB is one sector 191 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 192 * 193 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 194 * FREE 256kB 195 * 0x2204_0000 CONFIG_ENV_ADDR 196 * ENV_AREA 128kB 197 * 0x2206_0000 198 * FREE 199 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 200 * 201 */ 202 203 #ifdef FLASH 204 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 205 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 206 # define CONFIG_SYS_FLASH_CFI 1 207 # define CONFIG_FLASH_CFI_DRIVER 1 208 /* ?empty sector */ 209 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 210 /* max number of memory banks */ 211 # define CONFIG_SYS_MAX_FLASH_BANKS 1 212 /* max number of sectors on one chip */ 213 # define CONFIG_SYS_MAX_FLASH_SECT 512 214 /* hardware flash protection */ 215 # define CONFIG_SYS_FLASH_PROTECTION 216 217 # ifdef RAMENV 218 # define CONFIG_ENV_IS_NOWHERE 1 219 # define CONFIG_ENV_SIZE 0x1000 220 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 221 222 # else /* !RAMENV */ 223 # define CONFIG_ENV_IS_IN_FLASH 1 224 /* 128K(one sector) for env */ 225 # define CONFIG_ENV_SECT_SIZE 0x20000 226 # define CONFIG_ENV_ADDR \ 227 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 228 # define CONFIG_ENV_SIZE 0x20000 229 # endif /* !RAMBOOT */ 230 #else /* !FLASH */ 231 /* ENV in RAM */ 232 # define CONFIG_SYS_NO_FLASH 1 233 # define CONFIG_ENV_IS_NOWHERE 1 234 # define CONFIG_ENV_SIZE 0x1000 235 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 236 #endif /* !FLASH */ 237 238 /* system ace */ 239 #ifdef XILINX_SYSACE_BASEADDR 240 # define CONFIG_SYSTEMACE 241 /* #define DEBUG_SYSTEMACE */ 242 # define SYSTEMACE_CONFIG_FPGA 243 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR 244 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH 245 # define CONFIG_DOS_PARTITION 246 #endif 247 248 #if defined(XILINX_USE_ICACHE) 249 # define CONFIG_ICACHE 250 #else 251 # undef CONFIG_ICACHE 252 #endif 253 254 #if defined(XILINX_USE_DCACHE) 255 # define CONFIG_DCACHE 256 #else 257 # undef CONFIG_DCACHE 258 #endif 259 260 /* 261 * BOOTP options 262 */ 263 #define CONFIG_BOOTP_BOOTFILESIZE 264 #define CONFIG_BOOTP_BOOTPATH 265 #define CONFIG_BOOTP_GATEWAY 266 #define CONFIG_BOOTP_HOSTNAME 267 268 /* 269 * Command line configuration. 270 */ 271 #include <config_cmd_default.h> 272 273 #define CONFIG_CMD_ASKENV 274 #define CONFIG_CMD_IRQ 275 #define CONFIG_CMD_MFSL 276 #define CONFIG_CMD_ECHO 277 278 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) 279 # define CONFIG_CMD_CACHE 280 #else 281 # undef CONFIG_CMD_CACHE 282 #endif 283 284 #ifndef CONFIG_SYS_ENET 285 # undef CONFIG_CMD_NET 286 # undef CONFIG_CMD_NFS 287 #else 288 # define CONFIG_CMD_PING 289 # define CONFIG_CMD_DHCP 290 # define CONFIG_CMD_TFTPPUT 291 #endif 292 293 #if defined(CONFIG_SYSTEMACE) 294 # define CONFIG_CMD_EXT2 295 # define CONFIG_CMD_FAT 296 #endif 297 298 #if defined(FLASH) 299 # define CONFIG_CMD_ECHO 300 # define CONFIG_CMD_FLASH 301 # define CONFIG_CMD_IMLS 302 # define CONFIG_CMD_JFFS2 303 # define CONFIG_CMD_UBI 304 # undef CONFIG_CMD_UBIFS 305 306 # if !defined(RAMENV) 307 # define CONFIG_CMD_SAVEENV 308 # define CONFIG_CMD_SAVES 309 # endif 310 #else 311 # undef CONFIG_CMD_IMLS 312 # undef CONFIG_CMD_FLASH 313 # undef CONFIG_CMD_JFFS2 314 # undef CONFIG_CMD_UBI 315 # undef CONFIG_CMD_UBIFS 316 #endif 317 318 #if defined(CONFIG_CMD_JFFS2) 319 # define CONFIG_MTD_PARTITIONS 320 #endif 321 322 #if defined(CONFIG_CMD_UBIFS) 323 # define CONFIG_CMD_UBI 324 # define CONFIG_LZO 325 #endif 326 327 #if defined(CONFIG_CMD_UBI) 328 # define CONFIG_MTD_PARTITIONS 329 # define CONFIG_RBTREE 330 #endif 331 332 #if defined(CONFIG_MTD_PARTITIONS) 333 /* MTD partitions */ 334 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 335 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 336 #define CONFIG_FLASH_CFI_MTD 337 #define MTDIDS_DEFAULT "nor0=flash-0" 338 339 /* default mtd partition table */ 340 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 341 "256k(env),3m(kernel),1m(romfs),"\ 342 "1m(cramfs),-(jffs2)" 343 #endif 344 345 /* Miscellaneous configurable options */ 346 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " 347 /* size of console buffer */ 348 #define CONFIG_SYS_CBSIZE 512 349 /* print buffer size */ 350 #define CONFIG_SYS_PBSIZE \ 351 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 352 /* max number of command args */ 353 #define CONFIG_SYS_MAXARGS 15 354 #define CONFIG_SYS_LONGHELP 355 /* default load address */ 356 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START 357 358 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ 359 #define CONFIG_BOOTARGS "root=romfs" 360 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 361 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 362 #define CONFIG_IPADDR 192.168.0.3 363 #define CONFIG_SERVERIP 192.168.0.5 364 #define CONFIG_GATEWAYIP 192.168.0.1 365 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD 366 367 /* architecture dependent code */ 368 #define CONFIG_SYS_USR_EXCEP /* user exception */ 369 #define CONFIG_SYS_HZ 1000 370 371 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 372 373 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 374 "nor0=flash-0\0"\ 375 "mtdparts=mtdparts=flash-0:"\ 376 "256k(u-boot),256k(env),3m(kernel),"\ 377 "1m(romfs),1m(cramfs),-(jffs2)\0" 378 379 #define CONFIG_CMDLINE_EDITING 380 381 /* Use the HUSH parser */ 382 #define CONFIG_SYS_HUSH_PARSER 383 384 /* Enable flat device tree support */ 385 #define CONFIG_LMB 1 386 #define CONFIG_FIT 1 387 #define CONFIG_OF_LIBFDT 1 388 389 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) 390 # define CONFIG_MII 1 391 # define CONFIG_CMD_MII 1 392 # define CONFIG_PHY_GIGE 1 393 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 394 # define CONFIG_PHYLIB 1 395 # define CONFIG_PHY_ATHEROS 1 396 # define CONFIG_PHY_BROADCOM 1 397 # define CONFIG_PHY_DAVICOM 1 398 # define CONFIG_PHY_LXT 1 399 # define CONFIG_PHY_MARVELL 1 400 # define CONFIG_PHY_MICREL 1 401 # define CONFIG_PHY_NATSEMI 1 402 # define CONFIG_PHY_REALTEK 1 403 # define CONFIG_PHY_VITESSE 1 404 #else 405 # undef CONFIG_MII 406 # undef CONFIG_CMD_MII 407 # undef CONFIG_PHYLIB 408 #endif 409 410 #endif /* __CONFIG_H */ 411