xref: /rk3399_rockchip-uboot/include/configs/meson-gxbb-common.h (revision e090579d0a2d1aa38eab94b98877de9bcdd4f31d)
14b3ab59dSCarlo Caione /*
24b3ab59dSCarlo Caione  * Configuration for Amlogic Meson GXBB SoCs
34b3ab59dSCarlo Caione  * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
44b3ab59dSCarlo Caione  *
54b3ab59dSCarlo Caione  * SPDX-License-Identifier:	GPL-2.0+
64b3ab59dSCarlo Caione  */
74b3ab59dSCarlo Caione 
84b3ab59dSCarlo Caione #ifndef __MESON_GXBB_COMMON_CONFIG_H
94b3ab59dSCarlo Caione #define __MESON_GXBB_COMMON_CONFIG_H
104b3ab59dSCarlo Caione 
114b3ab59dSCarlo Caione #define CONFIG_CPU_ARMV8
124b3ab59dSCarlo Caione #define CONFIG_REMAKE_ELF
13*e42f096fSxypron.glpk@gmx.de #define CONFIG_NR_DRAM_BANKS		2
144b3ab59dSCarlo Caione #define CONFIG_ENV_SIZE			0x2000
154b3ab59dSCarlo Caione #define CONFIG_SYS_MAXARGS		32
164b3ab59dSCarlo Caione #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
174b3ab59dSCarlo Caione #define CONFIG_SYS_CBSIZE		1024
184b3ab59dSCarlo Caione 
194b3ab59dSCarlo Caione #define CONFIG_SYS_SDRAM_BASE		0
204b3ab59dSCarlo Caione #define CONFIG_SYS_TEXT_BASE		0x01000000
214b3ab59dSCarlo Caione #define CONFIG_SYS_INIT_SP_ADDR		0x20000000
224b3ab59dSCarlo Caione #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_TEXT_BASE
234b3ab59dSCarlo Caione 
244b3ab59dSCarlo Caione /* Generic Interrupt Controller Definitions */
254b3ab59dSCarlo Caione #define GICD_BASE			0xc4301000
264b3ab59dSCarlo Caione #define GICC_BASE			0xc4302000
274b3ab59dSCarlo Caione 
284b3ab59dSCarlo Caione #define CONFIG_SYS_LONGHELP
294b3ab59dSCarlo Caione #define CONFIG_CMDLINE_EDITING
304b3ab59dSCarlo Caione 
314b3ab59dSCarlo Caione #include <config_distro_defaults.h>
324b3ab59dSCarlo Caione 
3370b8bd7dSAndreas Färber #define BOOT_TARGET_DEVICES(func) \
341f677e42Sxypron.glpk@gmx.de 	func(MMC, mmc, 0) \
351f677e42Sxypron.glpk@gmx.de 	func(MMC, mmc, 1) \
361f677e42Sxypron.glpk@gmx.de 	func(MMC, mmc, 2) \
37e320d377SVagrant Cascadian 	func(PXE, pxe, na) \
3870b8bd7dSAndreas Färber 	func(DHCP, dhcp, na)
3970b8bd7dSAndreas Färber 
4070b8bd7dSAndreas Färber #include <config_distro_bootcmd.h>
4170b8bd7dSAndreas Färber 
4270b8bd7dSAndreas Färber #define CONFIG_EXTRA_ENV_SETTINGS \
4370b8bd7dSAndreas Färber 	"fdt_addr_r=0x01000000\0" \
4470b8bd7dSAndreas Färber 	"scriptaddr=0x1f000000\0" \
4570b8bd7dSAndreas Färber 	"kernel_addr_r=0x01080000\0" \
4670b8bd7dSAndreas Färber 	"pxefile_addr_r=0x01080000\0" \
47d0385748Sxypron.glpk@gmx.de 	"ramdisk_addr_r=0x13000000\0" \
4870b8bd7dSAndreas Färber 	MESON_FDTFILE_SETTING \
4970b8bd7dSAndreas Färber 	BOOTENV
5070b8bd7dSAndreas Färber 
51cc93834dSxypron.glpk@gmx.de #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* 64 MiB */
52cc93834dSxypron.glpk@gmx.de 
534b3ab59dSCarlo Caione #endif /* __MESON_GXBB_COMMON_CONFIG_H */
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